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STATIC TIMING ANALYSIS, CROSS TALK AND NOISE

STATIC TIMING ANALYSIS, CROSS TALK AND NOISE. By ANAND K N (1SI16LVS01). Contents. Introduction STA Functioning of STA Advantages of STA Crosstalk and Noise. Introduction. Static Timing Analysis is one of the techniques used to verify the timing of a digital design.

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STATIC TIMING ANALYSIS, CROSS TALK AND NOISE

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  1. STATIC TIMING ANALYSIS, CROSS TALK AND NOISE By ANAND K N (1SI16LVS01)

  2. Contents • Introduction • STA • Functioning of STA • Advantages of STA • Crosstalk and Noise

  3. Introduction • Static Timing Analysis is one of the techniques used to verify the timing of a digital design. • The term timing analysis is used to refer to either static timing analysis or the timing simulation. • Analysis does not depend upon the data values being applied at the input pins.

  4. Continued.., • In STA a stimulus is applied on input signals resulting behavior is observed and verified. • The purpose of static timing analysis is to validate if the design can operate at the rated speed.

  5. Basic figure of STA

  6. Functionality of STA • The DUA is the design under analysis • Examples of timing checks are setup and hold checks • Setup checks : It ensures that the data can arrive at a flip-flop within the given clock period • Hold checks : It ensures that a flip-flop captures the intended data correctly

  7. Functionality of STA • These checks ensure that the proper data is ready and available for capture and latched in for the new state • Entire design is analyzed once and the required timing checks are performed for all possible paths • STA is a complete and exhaustive method for verifying the timing of a design.

  8. Functionality of STA • The DUA is typically specified using a hardware description language such as VHDL or Verilog HDL • The external environment including a)Clock definitions b)SDC • The timing reports are in ASCII form with multiple columns and column showing one attribute of the path delay

  9. Advantages of STA • Static timing analysis is a complete and exhaustive verification of all timing checks of a design • Timing analysis methods such as simulation can only verify the portions of the design that get exercised by stimulus • Faster and simpler way of checking and analyzing all the timing paths

  10. What is Crosstalk and Noise • Traces are used to make the connections between various portions of the circuit • Interconnect induces noise and crosstalk • Crosstalk means interference • Noise means unwanted things (signal)

  11. Causes of Crosstalk and Noise • Design functionality and its performance can be limited by noise • Noise occurs due to crosstalk (interference) with other signals or due to noise on primary inputs or the power supply • Limit the frequency of operation and it can also cause functional failures

  12. THANK YOU

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