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Literature Review

Literature Review. A 280mV-to-1.1V 256b Reconfigurable SIMD Vector Permutation Engine with 2-D Shuffle in 22nm CMOS [ISSCC ’12]. Fang-Li Yuan Advisor: Prof. Dejan Marković 03/23/2012. IC Design Challenges: 1980s – Present. Energy Efficiency.

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Literature Review

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  1. Literature Review A 280mV-to-1.1V 256b Reconfigurable SIMD Vector Permutation Engine with 2-D Shuffle in 22nm CMOS [ISSCC ’12] Fang-Li Yuan Advisor: Prof. Dejan Marković 03/23/2012

  2. IC Design Challenges: 1980s – Present Energy Efficiency Moore’s Law continues to provide more transistors Power budgets limit our ability to use them • Session 1.4: Sustainability in Silicon & System Development • 1980s: Design productivity • 1990s: Power dissipation • 2000s: Leakage power • 2010s: Fang-Li Yuan 2

  3. Intel’s Solutions – From Transistors to Circuits 2012 ISSCC 2007 ISSCC Fang-Li Yuan 3

  4. Near-Vth Computing: Great for Energy Efficiency Fang-Li Yuan 4

  5. IA-32: 1st NTV Processor in 32nm CMOS Fang-Li Yuan 5

  6. NTV Circuits Gain 7x Efficiency in VPFP Mult-Add Fang-Li Yuan 6

  7. 1st NTV SIMD Engine in 22nm Tri-Gate Technology Fang-Li Yuan 7

  8. System-Level Overview Fang-Li Yuan 8

  9. Example: 64b 4x4 Matrix Transpose Fang-Li Yuan 9

  10. RF with PVT-tolerant Techniques & Vector FFs Fang-Li Yuan 10

  11. 250mV Vmin Reduction Across PVT Variations Fang-Li Yuan 11

  12. Vector FFs Reduce Hold-Time Violations @ Low V Fang-Li Yuan 12

  13. ULVS LS, & Interleaved Folded Crossbar Layout Fang-Li Yuan 13

  14. ULVS Improves Vmin by 125mV Fang-Li Yuan 14

  15. RF and Logic Co-optimization: Iso-Vmin Fang-Li Yuan 15

  16. Measured Performance Fang-Li Yuan 16

  17. Conclusions NTV computing is energy efficient but sensitive to PVT variation Static ckts (e.g. RF read): better than dynamic ckts @ NTV Shared P/N DETG writes improve Vmin across PVT variations Vector FF/Mux share transistors across gates, averaging variation ULVS LS interrupts contention devices, improving Vmin & power Byte-wise enable-signal gating reduces power Folded layout has 50% reduction in critical wiring length Interleaved, opposite-direction data wires achieve 50% lower line-to-line coupling, improving SI & delay Fang-Li Yuan 17

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