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Project Owyhee Digital Lock

Project Owyhee Digital Lock. Team Jessica Rice Julie Barton-Smith Cory Johnson. Advisor Dr. Inan, Dr. Osterberg Industry Representative Mr. Wes Mickanin. Overview. Introduction Scorecard Additional Accomplishments Plans Issues/Concerns. Introduction. Digital lock On MOSIS chip

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Project Owyhee Digital Lock

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  1. Project OwyheeDigital Lock Team Jessica Rice Julie Barton-Smith Cory Johnson • Advisor • Dr. Inan, Dr. Osterberg • Industry Representative • Mr. Wes Mickanin University of Portland School of Engineering

  2. Overview • Introduction • Scorecard • Additional Accomplishments • Plans • Issues/Concerns University of Portland School of Engineering

  3. Introduction • Digital lock • On MOSIS chip • Keypad entry with key override • Block Diagram University of Portland School of Engineering

  4. Introduction ctd. University of Portland School of Engineering

  5. Scorecard • Establish Testing Protocol • Series of 6 tests • Right and Wrong Codes • Door Open • 2 Wrongs Make a Right • Test Logic & Debug Logic Design • Ran Command File • It Worked! University of Portland School of Engineering

  6. Scorecard ctd. • Begin Design of Macro-model • Discussed Using CPLD’s • Use 6 Functional Blocks • Update Website • Formalize Project Plan • Change Request Approved University of Portland School of Engineering

  7. Additional Accomplishments • Acquired electric latch and door knob • Sent in chip 2 days early • Teleconferenced with Dr. Osterberg University of Portland School of Engineering

  8. Plans • Finish designing macro-model • Design Approval Meeting • Order Parts University of Portland School of Engineering

  9. Milestones University of Portland School of Engineering

  10. Concerns/Issues • Hardware Interface with MOSIS Chip • Re-Learning ABEL • Not Being in Same State Over Break University of Portland School of Engineering

  11. Conclusions • Introduction • On Chip Digital Lock • Scorecard • All finished except Macro-model Design • Additional Accomplishments • Sent Out Chip Early • Plans • Macro-model • Issues/Concerns • Interfacing with chip University of Portland School of Engineering

  12. Questions? University of Portland School of Engineering

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