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學生 : 李國彰 指導教授 : 林志明

學生 : 李國彰 指導教授 : 林志明. A 0.25-μm 20-dBm 2.4-GHz CMOS Power Amplifier With an Integrated Diode Linearizer. ( IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 13, NO. 2, FEBRUARY 2003 ). Outline. Abstract Introduction Circuit Design Measured Result Conclusion Reference. Abstract.

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學生 : 李國彰 指導教授 : 林志明

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  1. 學生:李國彰指導教授:林志明 A 0.25-μm 20-dBm 2.4-GHz CMOS Power Amplifier With an Integrated Diode Linearizer ( IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 13, NO. 2, FEBRUARY 2003 )

  2. Outline • Abstract • Introduction • Circuit Design • Measured Result • Conclusion • Reference

  3. Abstract • CMOS PA ( 2.4GHz , 20 dBm , 0.25μm 1P5M) • Firstly reported to use diode linearizer • Improvement in linearity ( gain compression , ACPR )

  4. Introduction • Severe blocks ( limited breakdown voltage ) • The method to improve PA linearity -conventional method - feedforward , feedback , predistortion -this paper -diode linearizer -integrated diode connected NMOS

  5. Circuit design • Drain-source breakdown voltage ( 5.4 V ) • Knee voltage ( 0.5 V ) • Two stage PA -output ( class AB ) ( high efficiency ) ( 960μm ) -input ( class AB ) ( power gain ) ( 1/3 output ) • Diode linearizer ( gate biasing circuit ) • Matching network ( microstrip ) • Whole chip area ( 1100 * 700 μm2 )

  6. Measured Results • Performed on a FR-4 PCB test fixture • Small signal gain ( 11.2dB ) • Input return loss ( 24 dB ) ( 2.45 GHz ) • Output power ( 20dBm ) • PAE ( 28% ) • Gain compression using diode linearizer is a little higher • ACPR ( Adjacent Channel Power Ratio )

  7. Conclusion • A first-reported 2.4 GHz CMOS PA integrated with diode linearizer fabricated in the TSMC 0.25- μm standard CMOS process • The designed PA reaches an output power of 20 dBm and a PAE of 28%. It demonstrates the great potential of standard CMOS process in designing and manufacturing for 2.4-GHz PA.

  8. Reference • [1] T. Yoshimasu, M. Akagi, N. Tanba, and S. Hara, “An HBT MMIC power amplifier with an integrated diode linearizer for low-voltage portable phone applications,” IEEE J. Solid-State Circuits, vol. 33, pp. 1290–1296, Sept. 1998. • [2] , “Alowdistortion and high efficiency HBT MMICpower amplifier with a novel linearization technique for =4 DQPSK modulation,” in IEEE GaAs IC Symp. Tech. Dig., 1997, pp. 45–48. • [3] C.Wang, L.-E. Larson, and P.-M. Asbeck, “A nonlinear capacitance cancellation technique and its application to a CMOS class AB power amplifier,” in IEEE RFIC Symp. Dig., 2001, pp. 39–42.

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