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Binary Arithmetic and Circuits: Operations and Implementation

Learn how to perform binary arithmetic functions, convert numbers to two's-complement notation, design and operate arithmetic circuits, and implement arithmetic functions using VHDL and FPGAs.

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Binary Arithmetic and Circuits: Operations and Implementation

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  1. Chapter 7 Arithmetic Operations and Circuits 1

  2. Objectives You should be able to: • Perform the four binary arithmetic functions: addition, subtraction, multiplication, and division. • Convert positive and negative numbers to signed two’s-complement notation. • Perform two’s-complement, hexadecimal, and BCD arithmetic. 2

  3. Objectives (Continued) • Explain the design and operation of a half-adder and a full-adder circuit. • Use full-adder ICs to implement arithmetic circuits. • Explain the operation of a two’s-complement adder/subtractor circuit and a BCD adder circuit. • Explain the function of an arithmetic logic unit (ALU). • Implement arithmetic functions in FPGAs using VHDL. 3

  4. Binary Arithmetic • Addition • When the sum exceeds 1, carry a 1 over to the next-more-significant column. • 0 + 0 = 0 carry 0 • 0 + 1 = 1 carry 0 • 1 + 0 = 1 carry 0 • 1 + 1 = 0 carry 1 5

  5. Binary Arithmetic • Addition • General form A0 + B0 = 0 + Cout • Summation symbol () • Carry-out (Cout) 6

  6. Binary Arithmetic • Carry-out is added to the next-more-significant column as a carry-in. 7

  7. Binary Arithmetic • Subtraction • 0  0 = 0 borrow 0 • 0  1 = 1 borrow 1 • 1  0 = 1 borrow 0 • 1  1 = 0 borrow 0 8

  8. Binary Arithmetic • Subtraction • General form A0B0 = R0 + Bout • Remainder is R0 • Borrow is Bout 9

  9. Binary Arithmetic • Subtraction • When A0 borrows from its left, A0 increases by 210. 10

  10. Binary Arithmetic • Multiplication • Multiply the 20 bit of the multiplier times the multiplicand. • Multiply the 21 bit of the multiplier times the multiplicand. Shift the result one position to the left. • Repeat step 2 for the 22 bit of the multiplier, and for all remaining bits. • Take the sum of the partial products to get the final product. 11

  11. Binary Arithmetic • Multiplication • Very similar to multiplying decimal numbers. 12

  12. Binary Arithmetic • Division • The same as decimal division. • This process is illustrated in Example 7-4. 13

  13. Example 7-4 14

  14. Example 7-4 (Continued) 14

  15. Two’s-Complement Representation • Both positive and negative numbers can be represented • Binary subtraction is simplified • Groups of eight • Most significant bit (MSB) signifies positive or negative 15

  16. Two’s-Complement Representation • Sign bit • 0 for positive • 1 for negative • Range of positive numbers (8-bit) • 0000 0000 to 0111 1111 (0 to 128) • Range of negative numbers (8-bit) • 1111 1111 to 1000 0000 (-1 to -128) 16

  17. Two’s-Complement Representation • Decimal-to-Two’s-Complement Conversion • If a number is positive, the two’s complement number is the true binary equivalent. • If a number is negative: • Complement each bit (one’s complement) • Add 1 to the one’s complement • The sign bit will always end up a 1. 18

  18. Two’s-Complement Representation 18

  19. Two’s-Complement Representation • Two’s-Complement-to-Decimal Conversion • If the number is positive (sign bit = 0), convert directly • If the number is negative: • Complement the entire two’s-complement number • Add 1 • Convert this to decimal • Result will be a negative number 19

  20. Discussion Point • Convert the following numbers to two’s-complement form: 3510 -3510 • Convert the following two’s-complement number to decimal: 1101 1101 20

  21. Two’s-Complement Arithmetic • Addition • Regular binary addition • Subtraction • Convert number to be subtracted to a negative two’s-complement number • Regular binary addition • Carry out of the MSB is ignored 21

  22. Discussion Point • Add the following numbers using two’s complement arithmetic: 19 + 27 18 – 7 21 – 13 59 – 96 22

  23. Hexadecimal Arithmetic • 4 binary bits represent a single hexadecimal digit • Addition • Add the digits in decimal • If sum is less than 16, convert to hexadecimal • Is sum is more than 16, subtract 16, convert to hexadecimal and carry 1 to the next-more-significant column 23

  24. Example 7-12

  25. Hexadecimal Arithmetic • Subtraction • When you borrow, the borrower increases by 16 • See example 7-15 24

  26. Example 7-15 25

  27. BCD Arithmetic • Group 4 binary digits to get combinations for 10 decimal digits • Range of valid numbers 0000 to 1001 • Addition • Add as regular binary numbers • If sum is greater than 9 or if carry out generated: • Add 6 (0110) saving any carry out 26

  28. Arithmetic Circuits • Only two inputs are of concern in the LSB column. • More significant columns must include the carry-in from the previous column as a third input. 27

  29. Arithmetic Circuits • The addition of the third input (Cin) is shown in the truth table below. 27

  30. Arithmetic Circuits • Half-Adder • No carry in (LSB column) • The 0 output is HIGH when A or B, but not both, is high. • Exclusive-OR function • Cout is high when A and B are high. • AND function 28

  31. Arithmetic Circuits • The half-adder can also be implemented using NOR gates and one AND gate. • The NOR output is Ex-OR. • The AND output is the carry. 28

  32. Arithmetic Circuits • Full-Adder • Provides for a carry input • The 1 output is high when the 3-bit input is odd. • Even parity generator • Cout is high when any twoinputs are high. • 3 AND gates and an OR 29

  33. Arithmetic Circuits • Full-adder sum from an even-parity generator 32

  34. Arithmetic Circuits • Full-adder carry out function 33

  35. Arithmetic Circuits • Logic diagram of a complete full-adder 34

  36. VHDL Description of a Full-Adder Note the concurrent statements for the two logic circuits.

  37. Arithmetic Circuits • Block diagrams of a half-adder (HA) and a full adder (FA). 35

  38. Arithmetic Circuits • Block diagram of a 4-bit binary adder 36

  39. Four-Bit Full-Adder ICs • Four full-adders in a single package • Will add two 4-bit binary words plus one carry input bit. 37

  40. Four-Bit Full-Adder ICs • Functional diagram of the 7483 • Note that some manufacturers label inputs A0B0 to A1B3 • The carry-out is internally connected to the carry-in of the next full-adder. 38

  41. Four-Bit Full-Adder ICs • Logic diagram for the 7483. 39

  42. Four-Bit Full-Adder ICs • Logic symbol for the 7483 39

  43. Four-Bit Full-Adder ICs • Fast-look-ahead carry • Evaluates 4 low-order inputs • High-order bits added at same time • Eliminates waiting for propagation ripple 40

  44. VHDL Adders Using Integer Arithmetic • Uses arithmetic operator and integer data type • Integer data type allows for values other than 1 and 0. • Integer range must be specified. • Software uses the range to determine the number of inputs required.

  45. System Design Application • Two’s-Complement Adder/Subtractor Circuit 41

  46. System Design Application • BCD Adder Circuit 42

  47. System Design Application • BCD adder simulation using MultiSIM: 43

  48. Arithmetic/Logic Units • The ALU is a multipurpose device • Available in LSI package • 74181 (TTL) • 74HC181 (CMOS) • Mode Control input • Arithmetic (M = L) • Logic (M = H) 44

  49. Arithmetic/Logic Units • Function Select - selects specific function to be performed 45

  50. FPGA Applications with VHDL and LPMs • FPGA implementation using macrofunctions, VHDL, and LPMs. • Library of Parameterized Modules (LPMs) are a new form of design entry in Quarus II. • Simplifies the design process for common systems like adders and ALUs. 46

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