236601 - Coding and Algorithms for Memories Lecture 2

1. 236601 - Coding and Algorithms for MemoriesLecture 2

2. Overview • Lecturer: EitanYaakobiyaakobi@cs.technion.ac.il, Taub 638 • Lectures hours: Thur 12:30-14:30 @ Taub 8 • Course website: http://webcourse.cs.technion.ac.il/236601/Spring2014/ • Office hours: Thur 14:30-15:30 and/or other times (please contact by email before) • Final grade: • Class participation (10%) • Homeworks (50%) • Take home exam/final Homework + project (40%)

3. What is this class about? Coding and Algorithms to Memories • Memories – HDDs, flash memories, and other non-volatile memories • Coding and algorithms – how to manage the memory and handle the interface between the physical level and the operating system • Both from the theoretical and practical points of view • Q: What is the difference between theory and practice?

4. You do not really understand something unless you can explain it to your grandmother

5. One of the focuses during this class: How to ask the right questions, both as a theorist and as a practical engineer

6. Memory Storage • Computer data storage (from Wikipedia): Computer components, devices, and recording media that retain digital data used for computing for some interval of time. • What kind of data? • Pictures, word files, movies, other computer files etc. • What kind of memories? • Many kinds…

7. Memories • Volatile Memories – need power to maintain the information • Ex: RAM memories, DRAM, SRAM • Non-Volatile Memories – do NOT need power to maintain the information • Ex: HDD, optical disc (CD, DVD), flash memories • Q: Examples of old non-volatile memories?

8. Some of the main goals in designing a computer storage: Price Capacity (size) Endurance Speed Power Consumption

9. Optical Storage • First generation – CD (Compact Disc), 700MB • Second generation – DVD (Digital Versatile Disc), 4.7GB, 1995 • Third generation – BD (Blu-Ray Disc) • Blue ray laser (shorter wavelength) • A single layer can store 25GB, dual layer – 50GB • Supported by Sony, Apple, Dell, Panasonic, LG, Pioneer

12. The Magnetic Hard Disk Drive “1” “0”

13. Flash Memories 3 2 1 0

14. Gartner & Phison

15. SLC, MLC and TLC Flash High Voltage High Voltage High Voltage SLC Flash MLC Flash TLC Flash 1 Bit Per Cell 2 States 2 Bits Per Cell 4 States 3 Bits Per Cell 8 States Low Voltage Low Voltage Low Voltage

16. Flash Memory Structure • A group of cells constitute a page • A group of pages constitute a block • In SLC flash, a typical block layout is as follows

17. Flash Memory Structure MSB/LSB • In MLC flash the two bits within a cell DO NOT belong to the same page – MSB page and LSB page • Given a group of cells, all the MSB’s constitute one page and all the LSB’s constitute another page 01 00 10 11

18. MLC Write Process MSB=1 MSB=0 MSB=1 MSB=0 voltage MSB=1 LSB=1 MSB=0 LSB=0 MSB=0 LSB=1 MSB=1 LSB=0 voltage PV1 PV2 PV3 Vread

19. Flash Memory Structure MSB Page CSB Page LSB Page MSB Page CSB Page LSB Page

20. Flash Memories Programming Array of cells made from floating gate transistors Typical size can be 32×215 The cells are programmed by pulsing electrons via hot-electron injection

21. Flash Memories Programming Array of cells made from floating gate transistors Typical size can be 32×215 The cells are programmed by pulsing electrons via hot-electron injection Each cell can have q levels, represented by different amounts of electrons In order to reduce a cell level, thee cell and its containing block must be reset to level 0 before rewriting – A VERY EXPENSIVE OPERATION

22. Programming of Flash Memory Cells • Flash memory cells are programmed in parallel in order to increase the write speed • Cells can only increase their value • In order to decrease a cell level, its entire containing block (~106 cells) has to be erased first • Flash memory cells do not behave identically • When charge is injected, only a fraction of it is trapped in the cell • Easy cells – most of the charge is trapped in the cell • Hard cells – a small fraction of the charge is trapped in the cell

23. Programming of Flash Memory Cells • Flash memory cells are programmed in parallel in order to increase the write speed • Cells can only increase their value • In order to decrease a cell level, its entire containing block (~106 cells) has to be erased first • Flash memory cells do not behave identically • When charge is injected, only a fraction of it is trapped in the cell • Easy cells – most of the charge is trapped in the cell • Hard cells – a small fraction of the charge is trapped in the cell • Goals: • Programming is done cautiously to prevent over-shooting • Programming should work for both easy and hard cells • And still… fast enough

24. Incremental Step Pulse Programming (ISPP) • Incremental Step Pulse Programming • Gradually increase the program voltage • First the easy cells reach their level • On subsequent steps, only cells which didn’t reach their level are programmed • Enable fast programming of both easy and hard cells

25. Rewriting Codes • Array of cells, made of floating gate transistors • Each cell can store q different levels • Today, q typically ranges between 2 and 16 • The levels are represented by the number of electrons • The cell’s level is increased by pulsing electrons • To reduce a cell level, all cells in its containing block must first be reset to level 0A VERY EXPENSIVE OPERATION

26. Rewriting Codes • Problem: Cannot rewrite the memory without an erasure • However… It is still possible to rewrite if only cells in low level are programmed

27. From Wikipedia: One limitation of flash memory is that, although it can be read or programmed a byte or a word at a time in a random access fashion, it can only be erased a "block" at a time. This generally sets all bits in the block to 1. Starting with a freshly erased block, any location within that block can be programmed. However, once a bit has been set to 0, only by erasing the entire block can it be changed back to 1. In other words, flash memory (specifically NOR flash) offers random-access read and programming operations, but does not offer arbitrary random-access rewrite or erase operations. A location can, however, be rewritten as long as the new value's 0 bits are a superset of the over-written values. For example, a nibble value may be erased to 1111, then written e.g. as 1110. Successive writes to that nibble can change it to 1010, then 0010, and finally 0000. Essentially, erasure sets all bits to 1, and programming can only clear bits to 0. File systems designed for flash devices can make use of this capability, for example to represent sector metadata.

28. Rewriting Codes Rewrite codes significantly reduce the number of block erasures Store 3 bits once Store 1 bit 8 times Store 4 bits once Store 1 bit 16 times

29. Rewriting Codes • One of the most efficient schemes to decrease the number of block erasures • Floating Codes • Buffer Codes • Trajectory Codes • Rank Modulation Codes • WOM Codes

30. Write-Once Memories (WOM) • Introduced by Rivest and Shamir, “How to reuse a write-once memory”, 1982 • The memory elements represent bits (2 levels) and are irreversibly programmed from ‘0’ to ‘1’ 1st Write 2nd Write

31. Write-Once Memories (WOM) • Examples: 1st Write 2nd Write

32. WOM Implementation in SLC Flash • A scheme for storing two bits twice using only three cells beforeerasing the cells • The cells only increase their level • How to implement? (in SLC block) • Each page stores 2KB/1.5 = 4/3KB per write • A page can be written twice before erasing • Pages are encoded using the WOM code • When the block has to be rewritten, mark its pages as invalid • Again write pages using the WOM code without erasing • Read before write at the second write 000.001.100.010.001 … 010 011.001.101.111.011 … 111 01.10.00.10.11 … 11 00.11.00.01.11 … 10 00.11.01.10.11 … 10 01.11.10.00.01 … 00 100.010.000.010.001 … 001 111.110.000.011.001 … 101 100.100.000.001.010 … 000 101.100.101.101.110 … 000 WOM ENCODER I N V A L I D ⋮ 000.010.001.100.000 … 010 000.110.111.111.110 … 010 011.001.101.111.011 … 111 000.001.100.010.001 … 010 100.010.000.010.001 … 001 111.110.000.011.001 … 101 001.010.100.000.100 … 010 111.110.100.101.101 … 110

33. BER for the First and Second Write

34. Why/When to Use WOM Codes? • Disadvantage: sacrifice a large amount of the capacity • Ex: Two write WOM codes • The best sum-rate is log3≈1.58 • Can write (at most) only 0.79n bits so there is a lost of (at least) 21% of the capacity • Advantage: Can increase the lifetime of the memory and reduce the write amplification

35. Why/When to Use WOM Codes? • Advantage: Can increase the lifetime of the memory and reduce the write amplification • Example: • User has 3GB of flash with lifetime 100 P/E cycles • Each day the user writes 2GB of new data (no need to store the old data) • Without WOM, the memory lasts 3/2*100=150 days • With WOM (the Rivest Shamir scheme)every two days the memory is erased once the memory lasts 2*100=200days

36. Write-Once Memories (WOM) • Introduced by Rivest and Shamir, “How to reuse a write-once memory”, 1982 • The memory elements represent bits (2 levels) and are irreversibly programmed from ‘0’ to ‘1’ Q:How many cells are required to write 100 bits twice? P1: Is it possible to do better…? P2: How many cells to write kbits twice? P3: How many cells to write kbits ttimes? P3’: What is the total number of bits that is possible to write in n cells in t writes? 1st Write 2nd Write

37. Binary WOM Codes • k1,…,kt:the number of bits on each write • n cells and t writes • The sum-rate of the WOM code is R = (Σ1tki)/n • Rivest Shamir: R = (2+2)/3 = 4/3

38. Definition: WOM Codes • Definition: An [n,t;M1,…,Mt] t-write WOM codeis a coding scheme which consists of n cells and guarantees any t writes of alphabet size M1,…,Mt by programming cells from zero to one • A WOM code consists of t encoding and decoding maps Ei, Di, 1 ≤i≤ t • E1: {1,…,M1}  {0,1}n • For 2 ≤i≤ t, Ei: {1,…,Mi}×{0,1}n {0,1}nsuch that for all (m,c)∊{1,…,Mi}×{0,1}n, Ei(m,c) ≥ c • For 1 ≤i≤ t, Di: {0,1}n {1,…,Mi}such that for Di(Ei(m,c)) =m for all (m,c)∊{1,…,Mi}×{0,1}n • The sum-rate of the WOM code is R = (Σ1t logMi)/n RivestShamir: [3,2;4,4], R = (log4+log4)/3=4/3

39. Definition: WOM Codes • There are two cases • The individual rates on each write must all be the same: fixed-rate • The individual rates are allowed to be different: unrestricted-rate • We assume that the write number on each write is known. This knowledge does not affect the rate • Assume there exists a [n,t;M1,…,Mt]t-write WOM code where the write number is known • It is possible to construct a [Nn+t,t;M1N,…,MtN]t-write WOM code where the write number is not-known so asymptotically the sum-rate is the same

40. The Capacity of WOM Codes • The Capacity Region for two writes C2-WOM={(R1,R2)|∃p∊[0,0.5],R1≤h(p), R2≤1-p} h(p) – the binary entropy functionh(p) = -plog(p)-(1-p)log(1-p) • The maximum achievable sum-rate ismaxp∊[0,0.5]{h(p)+(1-p)} = log3 achieved for p=1/3: R1 = h(1/3) = log(3)-2/3 R2= 1-1/3 = 2/3 • Capacity region (Heegard‘86, Fu and Han Vinck ‘99) Ct-WOM={(R1,…,Rt)| R1 ≤ h(p1), R2 ≤ (1–p1)h(p2),…, Rt-1≤ (1–p1)(1–pt–2)h(pt–1) Rt≤ (1–p1)(1–pt–2)(1–pt–1)} • The maximum achievable sum-rate is log(t+1)

41. The Capacity for Fixed Rate • The capacity region for two writes C2-WOM={(R1,R2)|∃p∊[0,0.5],R1≤h(p), R2≤1-p} • When forcing R1=R2 we get h(p) = 1-p • The (numerical) solution is p = 0.2271, the sum-rate is 1.54 • Multiple writes: A recursive formula to calculate the maximum achievable sum-rateRF(1)=1RF(t+1) = (t+1)root{h(zt/RF(t))-z}where root{f(z)} is the min positive value zs.t.f(z)=0 • For example:RF(2) = 2root{h(z)-z} = 20.7729=1.5458RF(3) = 3root{h(2z/1.54)-z}=3 0.6437=1.9311