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Beam Position Monitors Facility Advisory Committee October 12, 2006. Action Items from previous review Requirements / Specifications System overview Status Schedule. Action Items from Previous FAC. Decide on a Digitizer Echotek glitches, lockups, lack of progress Plan B Plan A:
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Beam Position MonitorsFacility Advisory CommitteeOctober 12, 2006 • Action Items from previous review • Requirements / Specifications • System overview • Status • Schedule
Action Items from Previous FAC • Decide on a Digitizer • Echotek glitches, lockups, lack of progress • Plan B Plan A: • Select 4 channel PAD digitizer. • Fix schedule • Still schedule trouble • Plan barely finishes on time • No schedule contingency
PRD 1.1-314 Full document:
Beam Position Monitor System Analog Frontend Version Three
Beam Test • 100 machine pulses • Effective beam charge 0.35 nC • sy = 2.5 microns
30 400 Resolution vs. Charge • Measured with beam in machine • Tightest machine requirement: 5 micron resolution @ 200 pC • Achieve 4 micron resolution @ 200 pC • Resolution scales like 1/Q for the three measured bunch charges, as expected 5mm @ 200pC
Linearity • Measured IP3 of BPM signal path • found IP3 within a few dB of calculation • Bench test of apparent position vs. amplitude looks good • Test consists of 15 kHz AM of 140 MHz signal • Results impeccable. • But beam test shows big amplitude position modulation • Discovered prototype not built to schematic • Gain distribution wrong Fixed • Took further steps: • Raise amp idle current 90 mA 140 mA • Reduce bandwidth of first filter, raise that of second filter • Narrowband filter before 2nd gain stage
Status • Prototype meets resolution requirement • Stability not well established • Long weekend test looks great • But doesn’t apply controlled temperature cycles • Attempt to resurrect CPE environmental chambers not successful • Thermal cycle tests yet to be performed • Proceeding with first article production
Calibration • Calibrate through BPM • Via stripline-stripline coupling • Not prototyped
Schedule What should be done: (E.M. 9/20/2006) • PCB layout – end of September - 29 ? • PCB fabrication – one week – October 9 ? • PCB assembling – one board here – October 13 • Chassis layout – September 28 • Panels punching and painting - early October • buy the rest of the components – connectors, resistors, capacitors, etc. • buy 23 chassis • Write detailed test procedure
SLC - Aware EPICS PVs VME IOC EVR Archive FIFO Timing Calib. X,Y,TMIT Waveform->U,V,S DedicatedEthernet Timing +Cal Data PAD IOC ADCAcq. diagnosticEPICS PVs AFE CTL AFE Software & Interface
BPM Controls Description • User Interface Layer (EPICS, SLC-aware) • VME IOC • Converts raw waveforms into X,Y,TMIT and feeds them (timestamped) to SLC. • Conversion parameters are Pvs • Controls calibration • PAD IOC • Sends raw data upstream (dedicated ethernet) • Diagnostic EPICS PVs
Software Functionality (Day 1) • From SLC-aware IOC • averaged BPM readings • buffered acquisition • EPICS • raw waveforms • conversion params. (raw position -> x,y) • attenuator settings • diagnostics
Functionality (Near Future) • Calibration [some features may be present at day one; untested]. • More sophisticated history buffers [other than SLC 'buffered acq'] • Filtering of beam codes in EPICS • Adjusting to beam charge in 'real-time'
Conclusions • Good performance demonstrated • Schedule critical