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Operating Systems. Prof. Navneet Goyal Department of Computer Science & Information Systems BITS, Pilani. Topics for Today. Segmentation Segmentation vs. paging Pentium Segmentation. Paging. Suffers from internal fragmentation NO user view Page size fixed
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Operating Systems Prof. Navneet Goyal Department of Computer Science & Information Systems BITS, Pilani
Topics for Today • Segmentation • Segmentation vs. paging • Pentium Segmentation
Paging • Suffers from internal fragmentation • NO user view • Page size fixed • In paging, user specifies only a single address • Single address is partitioned by HW into page no. and offset
Segmentation: Introduction Requirements • Eliminate internal fragmentation • Should provide user view • User view program as data, code, stack, etc. • Partition (segment) size could be anything • Partitions (segments) could be placed anywhere in the memory
Segmentation: Introduction For implementing, we need: • For each segment we need segment description consisting of: • Base address (starting address) of segment • Length of segment • Protection attributes • Segment description is stored in segment table • LAS is a collection of segments • Logical address should comprise of segment number & offset
Segmentation • All segments of a programs do not have to be of the same length • There is a maximum segment length • Since segments are not equal, segmentation is similar to dynamic partitioning
Segmentation • Memory-management scheme that supports user view of memory • A program is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, local variables, global variables symbol table, arrays
1 4 2 3 Logical View of Segmentation 1 2 3 4 physical memory space user space
Segmentation Architecture • Logical address consists of a two tuple: <segment-number, offset>, • Segment table – maps two-dimensional physical addresses; each table entry has: • base – contains the starting physical address where the segments reside in memory • limit – specifies the length of the segment • Segment-table base register (STBR) points to the segment table’s location in memory • Segment-table length register (STLR) indicates number of segments used by a program; segment number s is legal if s < STLR
Segmentation Hardware Base d
Pentium Segmentation • X86 Processor has Several segment registers • CS (code segment) • DS (Data Segment) • SS (Stack segment ) • ES (Extra segment) • GS & FS segment • Pentium allows a segment to be as large as 4 GB • Selector is 16 bit • Offset is 32 bit
Pentium Segmentation • LDT (Local Descriptor Table): one per process • GDT (Global Descriptor Table): one for the system • Pentium can support • pure segmentation or • (2) segmentation and paging
Memory Management Registers • Processor provides 4 memory management registers : • GDTR Global descriptor table register • LDTR Local Descriptor Table register • IDTR Interrupt descriptor Table register • TR Task register • These registers specify the location of data structure which control segmented memory management
Address Translation Steps • OS finds a place for LDT - It finds it at 0000500H • OS finds how much memory is needed by the segment. Finds free memory where it can be placed • Create LDT at 0000500H • Create entry in GDT corresponding to LDT • Scheduler finds the GDT entry and accesses it • Sets LDTR • Scheduler transfers the control of accessing the memory to processor
Combined Paging & Segmentation • Paging is transparent to the programmer • Paging eliminates external fragmentation • Pieces are to be moved in and out – paging helps! • Segmentation is visible to the programmer • Segmentation allows for growing data structures, modularity, and support for sharing and protection • Each segment is broken into fixed-size pages
Combined Paging & Segmentation • Why we need to combine paging & segmentation? • We want the best of both worlds!! • What about overheads in terms of HW support? • Is it worth?
Combined Paging & Segmentation • Why we need to combine paging & segmentation? • We want the best of both worlds!! • What about overheads in terms of HW support? • Is it worth?
Combined Paging & Segmentation • Segmentation and Paging can be used together. • Programmer is aware of segments. • Gains all the protection and sharing benefits. • Within each segment, paging is used. • Avoids external memory fragmentation • Uses memory efficiently. • Intel x86 processors since the 386 combine both.
Combined Paging & Segmentation • User process • Segments • Pages