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Explore the impact of non-uniform junction temperature (Tj) on LED chip performance and reliability. Learn about measurement methods, thermal management, and long-term effects on LED devices. Presented at ISMP 2014 in Korea. ###
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Non-uniform Junction Temperature Distribution on LED Chip Measurement, Characterization, Effects Mian TAO, Ricky LEE Department of Mechanical & Aerospace Engineering Center for Advanced Microsystems Packaging LED-FPD Technology R&D Center at Foshan Hong Kong University of Science and Technology 12th International Symposium on Microelectronics and Packaging KINTEX, Ilsan, Korea 15 October, 2014 ISMP 2014
Chip Heat Density Challenge Typical HP LED: 0.1 x 0.1 x 0.01 cm, 1W, 1 x 104 W/cm3 Intel I7 Xeon: 1.7 x 1.7 x 0.01 cm, 130W, 0.5 x 104 W/cm3 Source: DARPA
Importance of Thermal Management • Performance of an LED device is closely related to Tj • Instant Effects - Optical Performance • Quantum efficiency droop and radiant output decease • Red shifting of blue light • Correlated color temperature (CCT) of white light from RGB rises with Tj • Long Term Effects - Degradation and Reliability Problems • LED chip, nucleation and growth of micro-cracks • Chip bonding layer • Encapsulant
Instant Effects of Tj The CCT of the white light from the combination RGB shifting with Tj increasing [2] CREE EZ900 LED Chip Specification [1] [1] Specification of CREE EZ900 LED Chip [2] Chhajed, S.; Xi, Y.; Li, Y-L; Gessmann, Th; Schubert, E.F., "Influence of junction temperature on chromaticity and color-rendering properties of trichromatic white-light sources based on light-emitting diodes," Journal of Applied Physics , vol.97, no.5, pp.054506,054506-8, Mar 2005
Long Term Effects of Tj Degradation in encapsulation The excessive deformation induced by high Tj may cause delamination [3] [3] Jianzheng Hu, Lianqiao Yang, Woong Joon Hwang, Moo Whan Shin, Thermal and mechanical analysis of delamination in GaN-based light-emitting diode packages, Journal of Crystal Growth, Volume 288, Issue 1, 2 February 2006, Pages 157-161, ISSN 0022-0248, [4] Guangchen Zhang; Shiwei Feng; Zhou Zhou; Jing Liu; Jingwan Li; Hui Zhu, "Thermal Fatigue Characteristics of Die Attach Materials for Packaged High-Brightness LEDs," Components, Packaging and Manufacturing Technology, IEEE Transactions on , vol.2, no.8, pp.1346,1350, Aug. 2012 Degradation of chip bonding layer by high Tj under thermal cycling [4]
Lifetime and Tj Source: Lumileds
Tj Ts Evaluation of Thermal Resistance & Network Tj Rchip Tc Rbonding Tb q: Heat Flow Rate (W or kg·m2/s3) R, q : Thermal Resistance (C/W) k: Thermal Conductivity (W/m·C) h: Film Coefficient (W/m2·C) Rleadframe Ts Tj Rchip Tc Rbonding Tb Rsubstrate Ts Typical SMD LED Typical HP LED
LED Chips Are Getting Bigger & Hotter 0.3 0.26 x 10-4 1.18 x 104 Power (W) Volume (cm3) Power Density (W/cm3) 0.4 0.37 x 10-4 1.08 x 104 1.4 0.79 x 10-4 1.77 x 104 2.8 1.61 x 10-4 1.74 x 104 Source: Epistar
Package of Wire-Bonded LED 1.5 mm Chip Carrier (High thermal conductivity material) Formation of Chip Bonding Material (Solder/Adhesive) The p-n junction of a LED chip Light • Optical • Light source • 25% of the total power input • Emitting upward • Thermal • Heat source • 75% of the total power input • Conducted downward • Electrical • A common diode • Temperature characteristic Chip Bonding (Pick&Place and Curing) Heat 10 mm Wire Bonding (electrical connection) and Encapsulation (protection) 60 mil blue LED chip, lateral type, sapphire substrate
Package of Flip-chip LED Chip Carrier (High thermal conductivity material) Formation of Chip Bonding Material (Solder) Chip Bonding (Thermal Compression / Reflow) Encapsulation (protection)
Defects in Chip Bonding Layer - I • Chip was bonded to leadframe by adhesive (silver-filled epoxy) • Insufficient dosage of adhesive • Chip was bonded to a silicon carrier by soldering • Void inside the bonding layer • Flip-chip LED was bonded to a silver plated board by Au-Sn eutectic bonding • Void inside the bonding area
Defects in Chip Bonding Layer - II The Bonding Layer – Why Is It Important? Chip bonding layer provides primary • Mechanical Fixture • Thermal Path (Encapsulant is thermal insulating) Heat Flow Path DEFECTS IN BONDING LAYER LED p-n Junction • Emitting Light • Generating Heat LED Chip : • p-n Junction on top • Heat is conducted downward Chip Carrier : Carrying LED chip Defects in bonding layer, • Is Tj still uniformly distributed over the chip? • How to assess the non-uniform Tj, if any?
Conventional Tj Measurement Method Electrically, considering the LED to be an diode • Utilizing temperature characteristics of a diode • Most commonly used Thermally, considering the LED to be an object • IR thermography temperature measurement • Quantitatively measuring the radiance power emitted • Calculating the surface temperature from radiance power • What is the advantage? • IR thermography can provide the distribution of Tj • What are the disadvantages? • Exposed junction • IR emissivity influences the temperature measurement
Modeling of I-V Characteristics of LED • Based on Shockley diode model and ignoring the voltage consumed on the serial resistance, the LED forward voltage, Vf, can be expressed as where n is the ideality factor, I is the forward current, Tj is the absolute temperature of the p–n junction Csat, Vo and A are the three fitting parameters • Vf is a temperature sensitive parameter • Define K as • Vf under a certain forward current is linear proportion to Tj (1) (2) The LED itself can be used as a sensor to monitor Tj
K-factor Calibration Place the sample in a thermostat and provide a sensing current, Isense • The Isense typically is 1mA, • Isense is so small that cannot raise the Tj • The K factor is -1.6 mV/K • The resulted relationship between Tj change and Vf change is Thermostat providing a controllable temperature Set the thermostat to an intended temperature (e. g. 30 ºC to 90 ºC) Wait until thermal equilibrium (fluctuation of Vf is less than 0.1%) Tj is the same as the thermostat temperature Record the Vf and Tj Sufficient data points? If the K factor of a sample under a certain current is calibrated, DTj can be obtained from DVf NO YES Perform linear regression among all these Vf - Tj data points
Tj Measurement by Vf Method • Measure the Vf change in cooling • Tj change can be known from the K factor • In a cooling process, the sample will finally be cooled to Tamb Measurement Procedures : • Drive the sample under an operating current, Idrive, and the Tj would be raised up • After thermal equilibrium, Idrive is switched to Isense and the corresponding Vf is recorded as the Vsense,1 • After current switching, The temperature of the junctionbegins to descend • Wait till the junction is cooled down to Tamb and the corresponding Vf is recorded as the Vsense,2 • The Tj can be calculated Current Level Junction Temperature MeasureVsense,2 MeasureVsense,1 Idrive=350 mA Time Time cooling Isense=1 mA Measure Vsense,2 TJ,drive ≈ 80 ℃ Measure Vsense,1 cooling DT Tamb
Sample Description • Two types of LED chips with the p-n junction on top side • Two types of chip carrier • Adhesive chip bonding • Surface mounted on MCPCB • No encapsulant A LED Chip Lateral – Sapphire B LED Chip Vertical – SiC 5050 leadframe K1 Emitter leadframe
IR Thermography Setup FLIR-E63 IR Camera for Thermography Thermostat providing a known temperature The sample glued on the thermostat by thermal grease The Vf method was implemented by the T3Ster System
Consideration of Emissivity • The sample was placed in the thermostat • The temperature of the thermostat was set to be 70 ºC • Thermal equilibrium was achieved • The IR thermography images were captured • IR Emissivity, e, is the ratio of energy radiated by a particular material to energy radiated by a black body at the same temperature. • A true black body should have an ε = 1 • Any real object should have ε < 1 Emissivity substantially influences the temperature measurement results IR Thermography with one emissivity True IR Thermography
Calibration Process • Only the chip area was focused • Calibration Procedures : • Place the sample on the thermostat • Set the thermostat to a desired temperature • Wait until thermal equilibrium. This temperature is denoted as Tobj • Capture an IR image and obtain the image temperature, Timg of every pixel • Repeat step 2 ~ 4 Example : • Tobj = 40/50/60/70/80/90 °C • The Timg are shown below Wire bonding (Gold) Trace (Gold) Junction (GaN)
Calibration Results • A program was developed to perform the calibration • Pixel by pixel calibration • For illustration, the pixel at the center • Tobj = 40/50/60/70/80/90 °C • Timg = 39.9/41.3/53.5/60.6/67.5/74.7 °C (eset = 1) 4 4 Timg4 = aTobj4 + b The fitting goodness is excellent
Full Image Calibration • Before calibration • After calibration • The Root Mean Square Error (RMSE) of every pixels were calculated during the linear fitting • The RMSE image is shown on the left • The RMSE of most area is less than 0.5 °C
Calibrated Image of an Operating LED • Operating Condition : Thermostat - 40 °C; Idrive = 350/700/1000 mA Before Calibration After Calibration The calibration can effectively eliminate the influences from the emissivity
Validation of Tj Measurement Methods Tj measured by Vf method • Most widely used and trusted • The Tj given by the Vf method is considered to be correct Considering the IR method • Accuracy is uncertain • Temperature on the surface • The average temperature on the surface is used for comparison Define the relative error as : • Tj, relative error= (Tj, IR - Tj, Vf ) / Tj, Vf Validate the IR method by the relative error
Tj Measurement Results Comparison Test Condition : • Three different Idrive • Use different thermostat temperatures to imitate different Tamb
Tj Measurement Results Comparison Test Condition : • Three different Idrive • Use different thermostat temperatures to imitate different Tamb
Discussion on Measurement Results • Two main factors affecting the error • Junction temperature • Chip type – Sapphire/SiC • Higher Tj results in larger error • IR method tends to underestimate the Tj • For the chosen LED chip, the relative error is smaller than 5% The IR method for Tj measurement is validated
Sample Description • Sample preparation was the same as the samples in previous section • By means of controlling the adhesive dispensing, artificial defects were created • The residue adhesive material shows the area and boundary of bonding layer • The red dot denotes the location of Tj,max Sample-2 Sample-1 Sample-3 Sheared and flipped over Sample-5 Sample-4 Sample-6 4Corner
IR Thermography Inspection - I • In every sample with insufficient adhesive, the maximum temperature exists at the corner of the chip (denoted by a red circle) Non-uniform Tj phenomena were observed Sample-1 350mA Sample-4 350mA Sample-7 350mA Sample-1 700mA Sample-4 700mA Sample-7 700mA Sample-1 1000mA Sample-4 1000mA Sample-7 1000mA
IR Thermography Inspection - II • Similar phenomenon was observed in the Sample 4Corner as well 4Corner 700mA 4Corner 350mA 4Corner 1000mA Sample under Test 4Corner
Summary of Tj Measurement Results Corner or Center Temperature • The factors influencing the temperature Tj,max • Overall thermal resistance • Defects in the bonding layer Tj,center or Tj,corner • Overall thermal resistance • Introduce the temperature difference of these two feature temperatures DTj = Tj,max – Tj,center or DTj = Tj,max – Tj,corner
Summary of Temperature Differences Sample-4Corner Sample-4 • Tjchanges with the area of the defects • Tj can be used to assess the non-uniformity of Tj • The Tj ofSample 4Corner is greater than Sample-5 (45 mil chip) even though the defect area of these two samples are close • Void inside the bonding layer may intensify the non-uniformity of Tj
Chip Carrier for Soldering Chip Bonding • Focus on the void inside the bonding layer • The adhesive bonding area can be controlled • Soldering chip bonding was introduced • Silicon chip carrier fabrication • Silicon wafer • Al layer Deposition – 0.5 mm • Electroless Ni Plating – 2~3 mm • Electro Pure Sn Plating – 50~80 mm • Different bonding pattern (size), the red area was Sn plated Mark LED Chip Sn Ni Ni Ni Al Al Al Silicon Wafer Artificial void was build in the bonding layer
Samples Description 1. A soldering compatible LED 4. Glue on ceramic substrate 3. LED Chip + Carrier 2. Bonded to the chip carrier by soldering
Bonding Interface Cross-section Inspection Solder well wetted on the chip Sapphire substrate Surface Finishing : Gold Sn, 0.08 mm Cu, 0.02 mm Similar to HASL Without Solder Paste Silicon Wafer
IR Thermography Inspection Testing Condition : • Idrive = 700/800/900/1000/1100/1200 mA • Tamb = 30 °C Before Calibration After Calibration
Tj Correlation between IR and Vf Method • Different Isense results in different Tj • Not observed in normal samples • Caused by the non-uniformity of Tj Results of IR method Chose this case for further investigation
Tj Measurement with Different Isense Tmax • Idrive = 1100 mA • Tmax = 85.8 ºC • Tcorner = 61.1 ºC • Tavg = 71.0 ºC Tavg • Lower Sensing Current (Isense = 0.2 mA) Results in Higher Tj • Higher Sensing Current (Isense = 0.7 mA) Results in Lower Tj Dual IsenseMethod for Detecting the Non-uniformity of Tj
Dual Isense Method for Different Samples Sample 3 Sample 1 Sample 2 Test Condition : • Idrive = 1100 mA • Tamb = 30 °C DTj, IR– Non-uniformity DTj,Vf– Dual Isense Method
Mechanism of Multiple Isense Method • 4 LEDs are in parallel • One contacting thermostat • The other were insulated • Thermostat raise the temperature from 0 °C to 90 °C Isource = 40 mA, Ihot = 13 mA Contacting Insulated Isource = 40 mA, Ihot = 19 mA Non-uniform Isense Distribution Induced by Non-uniform Tj
Concluding Remarks • IR thermography for Tj distribution measurement was implemented with calibration. • Tj measurement using forward voltage was performed to validate the calibrated IR thermography method. • The non-uniform Tj distribution was proved by the artificial defect built in the bonding layer with the calibrated IR thermography method. • A modified electrical method with multiple sensing currents for non-uniform Tj characterization is under development.
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