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240-323, Part II Processes

Department of Computer Engineering, PSU Wannarat Suntiamorntut. 240-323, Part II Processes. Department of Computer Engineering, PSU Wannarat Suntiamorntut. Process Concept. Department of Computer Engineering, PSU Wannarat Suntiamorntut. Process State Transitions.

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240-323, Part II Processes

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  1. Department of Computer Engineering, PSU Wannarat Suntiamorntut 240-323, Part II Processes

  2. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process Concept

  3. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process State Transitions

  4. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process State

  5. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process control block (PCB) • Stores all of information about a process • Processes (PCBs) are manipulated by two main • components of the process subsystem in order to • achieve the effects of multiprogramming: • Scheduler: determines the order by which processes will • gain access to the CPU. Efficiency and fair-play are issues here. • Dispatcher: actually allocates CPU to process next in line as • determined by the scheduler.

  6. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process state pointer Process number Program counter Registers Memory limits List of open files ... Process control block (PCB)

  7. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process control block (PCB) • Process status (or state): new, ready to run, user running, • kernel running, waiting, halted • Program counter: where in program the process is executing • CPU registers: contents of general-purpose register stack pointer, • PSW, index registers • Memory Management info: segment base and limit registers, • page table, location of pages on disk, process size • User ID, Group ID, Process ID, Parent PID, ... • Event Descriptor: when process is in the “sleep” or waiting state • Scheduling info: process priority, size of CPU quantum, length • of current CPU burst

  8. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process scheduling Scheduling queues

  9. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process scheduling Schedulers • select process • long-term scheduler (job scheduler) selects processes • from the pool and loads them into memory for execution. • Short-term scheduler(cpu scheduler) selects processes • from among the processes that are ready to execute and • allocates the CPU to one of them.

  10. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process Priority

  11. Department of Computer Engineering, PSU Wannarat Suntiamorntut Context Switch • Switch the CPU to another process • speed varied from machine to machine • context-switch times are depended on hardware support

  12. Department of Computer Engineering, PSU Wannarat Suntiamorntut process A process B i/o request, timeout, ... executing waiting save A’s state restore B’s state dispatch save B’s state restore A’s state Multiprogramming to Context Switch

  13. Department of Computer Engineering, PSU Wannarat Suntiamorntut Forking a new process

  14. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process terminate

  15. Department of Computer Engineering, PSU Wannarat Suntiamorntut Process terminate

  16. Department of Computer Engineering, PSU Wannarat Suntiamorntut Concurrent Process • Implementing a multiprogramming OS requires programming to accommodate a number of simultaneously executing processes • Multiple-process paradigm also useful for applications (e.g., parallel processing, background processing) • Two kinds of parallelism in today's computer systems: • Pseudo-parallelism - one CPU supports multiple processes • True parallelism - processes run on multiple CPUs

  17. Department of Computer Engineering, PSU Wannarat Suntiamorntut Concurrent Process • Two kinds of communication paradigms: • - Shared-variable model • - Message-passing model • Most systems incorporate a mixture of the two.

  18. Department of Computer Engineering, PSU Wannarat Suntiamorntut Interprocess Communication (IPC)

  19. Department of Computer Engineering, PSU Wannarat Suntiamorntut How are links established? • Direct communication • send(process_id, message) receive(process_id, message) Example : producer and consumer problem

  20. Department of Computer Engineering, PSU Wannarat Suntiamorntut Direct communication Process : producer repeat ... Produce an item in nextp ... Send(consumer,nextp); ... until false; Process : consumer repeat receive(producer,nextc); ... Consume the item in nextc ... until false; This is a symmetry in addressing

  21. Department of Computer Engineering, PSU Wannarat Suntiamorntut P mbox R Q How are links established? • Indirect Communication • send(mailbox, message) receive(mailbox, message) - Associate with more than two processes.

  22. Department of Computer Engineering, PSU Wannarat Suntiamorntut What’s the capacity of the links? • Buffering : three ways to implement queue • - Zero capacity • - Bounded capacity • - Unbounded capacity A “zero-capacity” buffer means processes must “handshake” in order to communicate.

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