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CSIE30300 Computer Architecture Unit 01: Introduction

CSIE30300 Computer Architecture Unit 01: Introduction. Hsin-Chou Chi [Adapted from material by Patterson@UCB and Irwin@PSU]. Where is the Market?. Millions of Computers. Instruction Set Architecture (ISA).

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CSIE30300 Computer Architecture Unit 01: Introduction

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  1. CSIE30300 Computer Architecture Unit 01: Introduction Hsin-Chou Chi [Adapted from material by Patterson@UCB and Irwin@PSU]

  2. Where is the Market? Millions of Computers

  3. Instruction Set Architecture (ISA) • ISA: An abstract interface between the hardware and the lowest level software of a machine that encompasses all the information necessary to write a machine language program that will run correctly, including instructions, registers, memory access, I/O, and so on. • Enables implementations of varying cost and performance to run identical software

  4. ISA Type Sales Millions of Processor

  5. Moore’s Law • In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would double every 18 to 24 months (i.e., grow exponentially with time). • Amazingly visionary – million transistor/chip barrier was crossed in the 1980’s. • 2300 transistors, 1 MHz clock (Intel 4004) - 1971 • 16 Million transistors (Ultra Sparc III) • 42 Million transistors, 2 GHz clock (Intel Xeon) – 2001 • 55 Million transistors, 3 GHz, 130nm technology, 250mm2 die (Intel Pentium 4) - 2004 • 140 Million transistor (HP PA-8500)

  6. Processor Performance Increase Intel Pentium 4/3000 DEC Alpha 21264A/667 DEC Alpha 21264/600 Intel Xeon/2000 DEC Alpha 5/500 DEC Alpha 4/266 DEC Alpha 5/300 DEC AXP/500 IBM POWER 100 HP 9000/750 IBM RS6000 MIPS M2000 SUN-4/260 MIPS M/120

  7. DRAM Capacity Growth 512M 256M 128M 64M 16M 4M 1M 256K 64K 16K

  8. Impacts of Advancing Technology • Processor • logic capacity: increases about 30% per year • performance: 2x every 1.5 years • Memory • DRAM capacity: 2x every 1.5 years, now 2x every 2 years • memory speed: 1.5x every 10 years • cost per bit: decreases about 25% per year • Disk • capacity: increases about 60% per year ClockCycle = 1/ClockRate 500 MHz ClockRate = 2 nsec ClockCycle 1 GHz ClockRate = 1 nsec ClockCycle 4 GHz ClockRate = 250 psec ClockCycle

  9. Example Machine Organization • Workstation design target • 25% of cost on processor • 25% of cost on memory (minimum memory size) • Rest on I/O devices, power supplies, box Computer CPU Memory Devices Control Input Datapath Output

  10. PC Motherboard Closeup

  11. Inside the Pentium 4 Processor Chip

  12. MIPS R3000 Instruction Set Architecture Registers • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • coprocessor • Memory Management • Special R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate OP jump target Q: How many already familiar with MIPS ISA?

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