Exam 2 Topics

1. Exam 2 Topics Open Book, Open Note, Bring a Calculator 3-4 Multipart Questions • Device Packaging, Mfg Production Design • Substrates: PCB’s, Flex Circuits, Materials, Basic Mfg Process • Thru Hole Packages: Discretes, ICs • SMT Packages: Discrete, Small Outline, Flatpack, Chipcarrier, Array • Sockets, Interconnection Systems • TH Mfg Processes: Prep, Insert, Wave Solder, Trim, Test • SMT Mfg Processes: Prep, Screen Solder Paste, Place, Reflow, Test • Microelectronic Assembly: Chipscale, MCM, COB, Wirebond • Testing & Inspections: ICT, FCT, JTAG, Visual, AOI, XAOI, Stresses • Manual vs Automatic Assembly Operations • Levels of Assembly/Test • IPC Assembly Class 1, 2 and 3 Workmanship Levels

2. Analog Design For Mass Production • Op Amp Basic Inverting, Non-inverting configurations, Nom Gains • Op Amp Vio, Iio, Ib, Ad, Ac, CMRR, Slew Rate • DC Errors caused by Vio, Iio, Ib • Gain Errors caused by Ad • Total Error Voltage and Effects of Resistor Tolerance • Slew Rate Distortion • Op Amp max Vout, Iout • Basic frequency response circuit analysis • Finding Av(s) from circuit analysis • Steady State Response Av(jw) • Finding Mag |Av(jw)|, Phase |Av(jw)|, from Av(s) • Discrete Component Specification • Noise Sources • What types of Analysis are Required or Suggested for Subcircuits

3. Digital Design for Mass Production • Basic Technology Families for IC’s (TTL, CMOS, etc) • Basic DC drive data sheet parameters (Vih, Iol, etc) • DC drive design compatibility analysis • 6 Life Cycle Phases and Statistical Relationship • Std and Schmitt Trigger Inputs • Totem pole, Open Collector (Drain) and Tristate Outputs • Edge Rates, Noise Margins, Comparators, Schmitt Triggers • Logic Level Voltage Translations • Basic Combinatorial Design, DeMorgan Gates • Truth Tables, Karnaugh Maps, Min Terms • Flipflop types, timing specifications (Tsu, Th, etc) • Metastability MTBF • Timing diagrams & Timing Analysis Using Target Device • State Diagrams, State Variables, Transitions, Inputs/Outputs • Simple State Machine Design, Moore and Meally Types • Programmable Devices, PLDs, ROMs • Equation Based State Machine Design

4. Mixed Signal Design For Mass Production • Basic Analog Digital Numeric Conversions • A/DD/A Maximum SNR • SAR, Integrating, Flash and Sigma-Delta Converter Architectures • Converter Errors • Quantization Error • Gain Error • Offset Error • INL • DNL

5. Statistics & Reliability • Basic Stats: Mean, Std Deviation, Median, Mode • Specification Limits, Z values • Samples vs Full Populations, Normal and Weibull Distributions • 6 Sigma Quality, 1.5 sigma Shifts, Z values • Bathtub Curve, Failure Rate vs Time, Infantile vs End of Life Failures • 6 Life Cycle Phases and Statistical Relationship • Physics of Failure, CTE mismatch, fatigue • Series Reliability vs Parallel/Redundant • MTBF, Reli(%) and FITs • Allocation & Reliability Summation, l, R(t), Warranty, , h • Stresses and Stress Factor Multipliers, P • Prediction Standards and Databases • Parts Count Prediction Method Flaws • Component Derating Guidelines, Capacitor Applications • HALT, HASS, HAST, ESS Processes and Stress Accelerations • Life Stress Modeling

6. Intellectual Property • 4 Types of IP • Definition & Purpose of a US Patent • Patent Limitations and Coverages • Types of Patents • Criteria for Patentability • Prior Art • Format of Patent, Sections • Sustainability & Verification • Life Cycle Phases and Obsolescence • User Manual Basics • Forms of Objective Evidence • 3 methods of verification