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ASICs for EO Remote Sensing. Steve Parkes Space Technology Centre, University of Dundee. Contents. Overview ASICs FPGAs State-of-the-art Application to challenges in EO remote sensing Instrument processing and control Onboard data-handling. Overview. ASIC.
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ASICs for EO Remote Sensing Steve Parkes Space Technology Centre, University of Dundee
Contents • Overview • ASICs • FPGAs • State-of-the-art • Application to challenges in EO remote sensing • Instrument processing and control • Onboard data-handling
ASIC • Application Specific Integrated Circuit • Array of logic gates fabricated in the chip • Final metal layers customised • Connect logic elements together • So they implement a specific function • ASICs implement digital logic functions efficiently • Processors can now be embedded in an ASIC • System on chip
FPGA • Field Programmable Gate Array • Similar to an ASIC • Programmable interconnections between logic elements • Typically • Anti-fuse to make connections between matrix of interconnection tracks • Pass transistors that make connections between tracks with memory cells driving the pass transistors • Ideal for instrument control and simple processing • Actel, Xilinx, Atmel, • Ideal for prototyping ASICs
Instruments Onboard Data-Handling System Sensor ADC Processing Actuators Control
Current Space ASIC Technology • Atmel • 180 nm • 5.5. Million gates • Up to 625 pins • Multi-project wafer • 100 krads • No SEL at 95 MeV/mg/cm2 • SEU > 30 Mev/mg/cm2 • System on chip e.g. SpW-RTC (AT7913E) • LEON SPARC processor • Memory • I/O Interfaces • CAN • SpaceWire
High Performance Processing • Inmarsat 4 Transponder Processor • EADS Astrium • Launched in 2005 • Mass 150 kg • Power 2 kW • 2000 ASICs of 300 k gates each • 600 M gates • 700 nm technology
Future technology 65 nm • 10-30 Million gates • 3-8 Mbits RAM • High-speed serial IO • 200-400 MHz clock • Rad Hard • 100 krad • No SEL 80MeVcm2/mg • SEE <10-10/bit/day • Inmarsat 4 processor in approx 20 devices instead of 2000
EO Processing Examples • Data compression • Wideband spectrometers • SAR data compression and onboard processing • Digital beam-forming • Digital chirp generation • Feature/event recognition • ...
SpaceWire • Connects together data-handling elements onboard a spacecraft: • Instruments • Processors • Mass memory • Telemetry and Telecommand • Standard interface • Simplifies Integration and Test • Encourages equipment reuse • Standard written by University of Dundee
SpaceWire Key Features • Simple • Easy to use • Low gate count • High speed (2-200 Mbits/s) • Bi-directional • Flexible • Special features like time-codes
SpaceWire Architectures • Point-to-point links • Networks • Arbitrary topology • Fault tolerance where needed • Bandwidth where needed • Very easy to build an onboard data-handling system to meet specific mission requirements
SpaceWire Architectures Instrument 1 High Rate Router Memory Processor Instrument 2 Prime Router Router Memory Instrument 3 Processor Instrument 4 Redundant Bridge Sensor A Sensor B Sensor C
SpaceWire an Enabling Technology • For international missions • Instruments designed in in one country • Can be readily used and reused on spacecraft being developed by another country • Specialist instrument expertise can be used more widely • Easy to do with common interfaces • And a flexible architecture
Conclusion • ASICs • Incredible processing power possible • Move towards standard system on chip products • Much more on chip that any one application needs • Use the bits you want • Systems that were not feasible in past are now possible • FPGAs • High number of gates • Replacing ASICs for application specific designs • SpaceWire • Standard onboard networking technology • Enabling reuse • Rapid integration and test
Space Fibre • Very high data rate applications • 2.5 G bits/s plus • Over fibre and copper • Fibre optic communications • 100 m plus • Copper • Short length (5m) • Galvanically isolated • Light weight cables • Able to integrate with SpaceWire network
Actel RTAX-S Devices • RTAX250S/SL • 250 k system gates (30 k ASIC gates) • 54 k embedded RAM • 248 user I/Os • RTAX1000S/SL • 1000 k system gates (125 k ASIC gates) • 162 k embedded RAM • 516 user I/Os • RTAX2000S/SL • 2000 k system gates (250 k ASIC gates) • 288 k embedded RAM • 684 user I/Os