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April 20 , 2009

April 20 , 2009. Super-Integration. About siXis. Founded May 2008 Spun out of RTI International $5M Series A funding in June 2008 Investors: Intersouth Partners, RTI International CED “Spin-out of the Year Award” Major technology focus on silicon circuit board technology

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April 20 , 2009

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  1. April 20, 2009 Super-Integration

  2. About siXis • Founded May 2008 • Spun out of RTI International • $5M Series A funding in June 2008 • Investors: Intersouth Partners, RTI International • CED “Spin-out of the Year Award” • Major technology focus on silicon circuit board technology • Initial application in high performance reconfigurable computing • Headquartered in Research Triangle Park, NC • Veteran senior management team in place • Co-located with semiconductor fab facility

  3. Established in 1958 2600 employees half with advanced degrees Revenue of $0.6B Multidisciplinary research institute: technology, health solutions, statistical and social sciences RTI International at a Glance RTI is the second largest private nonprofit R&D organization in USA. 180-Acre Campus 24 Buildings 810,000 sq. ft Space RTI interest in 3D integration: • 3D integration technology development since 2000 (MCNC) • Spin-off in bonding technology: Ziptronix

  4. siXis Technology Overview

  5. Key Value Proposition reticle limits • Maximize Performance per cm2-W with Super-Integration • Go beyond stepper reticle limits • Integrate different technologies, e.g. • DRAM • Logic – FPGA, processor • Analog – ADC, DAC, RF • Passives – resistors, capacitors • Fit into existing infrastructure • Sustaining technology 5

  6. Super-Integration Top View Conventional Super-Integration FR-4 PCB SiCB Silicon Circuit Board

  7. Super-Integration Side View Conventional Packaged FPGA User FR4 PCB Super-Integration Power assumptions: (1 ea) FPGA power is 30W @ ½ core and ½ I/O (16 ea) Memory is DDR2, 1Gb, 1.8v, 330mA 7

  8. siXis Product Roadmap

  9. SX2000 (Conventional Packaging 1U Shelf) 9

  10. Compute Node Conventional Compute Node SiCB Compute Node 10

  11. SX3000 (Super-Integration SiCB 1U Shelf)

  12. siXis FPGA Programming Model • RTL Programming Model • Verilog & VHDL – brute force, slow, wysiwyg • C Models – faster, more hardware, silicon aware, scheduler • Impulse-C • Cebatech C2R • Matlab to RTL --scheduler, more hardware • Xilinx Accelchip • DSP to RTL • Simulink to FPGA • Synplify DSP -- Synopsys/Synplicity • DSP Builder – Altera • System Generator – Xilinx

  13. siXis Product Roadmap

  14. End

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