1 / 62

Chapter 3

Chapter 3. Gate-level Minimization. Chapter3: Gate-level Minimization. 3-2 The Map Method. Two-variable map and Three-variable map. 3-3 Four-Variable Map. 3-4 Five-variable Map. 3-5 Product of Sums Simplification. 3-6 Don’t-care Conditions. 3-7 NAND and NOR Implementation.

forrest-shields
Download Presentation

Chapter 3

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Chapter 3 Gate-level Minimization

  2. Chapter3: Gate-levelMinimization 3-2 The Map Method Two-variable map and Three-variable map 3-3 Four-Variable Map 3-4 Five-variable Map 3-5 Product of Sums Simplification 3-6 Don’t-care Conditions 3-7 NAND and NOR Implementation 3-8 Other Two-LeveI Implementations 3-9 Exclusive-OR Function

  3. 3-2 The Map Method • Simplification of Boolean Expression – Minimum # of terms, minimum # of literals – To reduce complexity of digital logic gates – The simplest expression is not unique • Methods: – Algebraic minimization  lack of specific rules • Section 2.4 – Karnaugh map or K-map • Combination of 2, 4, … adjacent squares Logic circuit  Boolean function  Truth table  K-map  Canonical form (sum of minterms, product of maxterms)  (Simplifier) standard form (sum of products, product of sums)

  4. 3-2 The Map Method A Karnaugh map is a graphical tool for assisting in the general simplification procedure.

  5. Two-Variable Maps Y’ Y X’ X 2 variables  4 minterms  4 squares.

  6. Rules for K-Maps We can reduce functions by circling 1’s in the K-map Each circle represents minterm reduction Following circling, we can deduce minimized and-or form. Rules to consider Every cell containing a 1 must be included at least once. The largest possible “power of 2 rectangle” must be enclosed. The 1’s must be enclosed in the smallest possible number of rectangles.

  7. Two-Variable Maps (Cont.) a a 0 1 0 1 b b 0 0 1 0 1 1 1 0 1 1 0 0 g = b' f = a B F=AB+A’B 0 1 A 0 1 0 1 1 0 Two variable maps:

  8. Y X

  9. 2-Variable Map Simplification Example (1) 1 1 X Example: F(X,Y) = XY’ + XY From the map, we see that F (X,Y) = X. Note: There are implied 0s in other boxes. This can be justified using algebraic manipulations: F(X,Y) = XY’ + XY = X(Y’ +Y) = X.1 = X

  10. 2-Variable Map Simplification Example (2) 1 1 1 Y G(x,y) = m1 + m2 + m3 = X’Y + XY’ + XY From the map, we can see that G = X + Y X G(x,y) = m1 + m2 + m3

  11. 2-Variable Map Simplification Example (3) y 0 1 x x’y’ x’y 0 y x y F 0 0 1 0 1 1 1 0 0 1 1 0 y 1 x xy’ xy 0 1 x 1 1 0 1 0 0 X’ F = Σ(m0,m1) Using algebraic manipulations F = Σ(m0,m1) = x’y + x’y’ = x’ (y+y’) = x’

  12. Three-Variable Maps How can we locate a minterm square on the map?  Use figure (a) OR  use column # and row # from figure (b)E.g. m5 is in row 1 column 01 (5 10 = 101 2) 3 variables 8 minterms (m0 – m7). Q. Show the area representing X’? Y’? Z’?

  13. • 8 minterms for 3 binary variables • Any two adjacent squares differ by only one variable yz yz

  14. Three-Variable Maps (Cont.) By combining squares in powers of 2, we reduce number of literals in a product term, reducing the literal cost, thereby reducing the other two cost criteria. On a 3-variable K-Map: One square represents a minterm with three variables Two adjacent squares represent a product term with two variables Four “adjacent” terms represent a product term with one variables Eight “adjacent” terms is the function of all ones (logic 1).

  15. 3-Variable Map Simplification Example (1) Adjacent Squares m0+m2 = X’Y’Z’ + X’YZ’ = X’Z’(Y’+Y) = X’Z’ m4+m6 = XY’Z’ + XYZ’ = XZ’(Y’+Y) = XZ’

  16. 3-Variable Map Simplification Example (2) F = X’Y’Z’ + X’YZ’ + XY’Z’ + XYZ’ = Z’ (X’Y’ + X’Y + XY’ + XY) = Z’ (X’ (Y’+Y) + X (Y’+Y)) = Z’ (X’+ X) = Z’

  17. 3-Variable Map Simplification Example (3) BC 00 01 11 10 A 0 0 1 0 1 1 1 1 1 1 F=A+BC+BC F=AB’C’ +ABC +ABC +ABC + A’B’C + A’BC’

  18. 3-Variable Map Simplification Example (4) 1 1 1 1 Y = + + + F ( x , y , z ) x y z x y z x y z x y z YZ 00 01 11 10 X = + yz y z 0 = y 1 X Z Y Example: F (x, y, z)= Σm (2, 3, 6, 7) Applying the Minimization Theorem three times: Thus the four terms that form a 2 × 2 square correspond to the term "y".

  19. 3-Variable Map Simplification Example (5) X’Y 1 1 1 1 XY’ Y YZ 00 01 11 10 X 0 1 X Z F(X,Y,Z) = X’Y + XY’ Example: Simplify F (x, y, z)= Σm (2, 3, 4, 5)

  20. 3-Variable Map Simplification Example (6) bc b bc 00 01 11 10 X 0 ac’ 1 1 a 1 1 1 c a Example: Simplify G (a, b, c)= Σm (3, 4, 6, 7) G (a,b,c) = bc + ac’

  21. 3-Variable Map Simplification Example (7) x y z Y YZ 00 01 11 10 X 1 1 1 0 1 1 1 X + x z y Z • In general, as more squares are combined, we obtain a product term with fewer literals. • Overlap is allowed. Example: Simplify F(X, Y, Z) = X’Z + X’Y + XY’Z + YZ F(X, Y, Z) = Σm (1, 2, 3, 5, 7) = F(x, y, z)

  22. Examples 3-1 and 3-2

  23. Examples 3-3 and 3-4 One square represents one minterm, giving a term of three literals • Two adjacent squares represent a term of two literals • Four adjacent squares represent a term of one literal

  24. 3-3 Four-Variable Map • Two adjacent squares represent a term of three literals • Four adjacent squares represent a term of two literals • Eight adjacent squares represent a term of one literal The larger the number of squares combined, the smaller the number of literals in the term

  25. Flat Map Vs Torus

  26. Examples 3-5 and 3-6 x x

  27. 4-Variable Map Simplification Example F = m(0,1,2,4,5,6,8,9,12,13,14) F = Y’ + XZ’ + W’Z’

  28. 4-Variable Map Simplification Example F = m(0,2,4,5,6,7,10,13,15) Do it and show it to me next time!

  29. Simplification Using Prime Implicants • A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2. • A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms. • Prime Implicants and Essential Prime Implicants can be determined by inspection of a K-Map. 29

  30. 1 30

  31. Example of Prime Implicants CD C B B D D B C 1 1 1 1 1 1 1 1 BD BD 1 1 B B 1 1 1 1 A A 1 1 1 1 1 1 1 1 A B D D AD Minterms covered by single prime implicant ESSENTIAL Prime Implicants C Find ALL Prime Implicants

  32. Prime Implicant Practice Y X W Z 1 1 1 1 1 1 1 1 1 1 1 Find all prime implicants for: F (W,X,Y,Z) = (0,2,3,8,9,10,11,12,13,14,15) Prime implicants are: W, X‘Y, and X‘Z‘ Note that all of these prime implicants are essential.

  33. Another Example Y X W Z 1 1 1 1 1 1 1 1 1 Find all prime implicants for: G(W,X,Y,Z) = (0,2,3,4,7,12,13,14,15) Hint: There are seven prime implicants! Prime Implicants are WX, XY’Z', W’Y’Z', W’X’Z', W’X’Y, W’YZ, XYZ. There is only one essential prime implicant: WX.

  34. 3-4 Five-Variable Map 34

  35. 35

  36. Example 3-7 36

  37. 3-5 Product-of-Sums Simplification E.g. Simplify the following Boolean function in product-of-sums form F(A,B,C,D)= m(0,1,2,5,8,9,10) Mark with 1’s the minterms of F. Mark the remaining squares with 0’s. These represent F’. Find the simplified F’.F’ = AB + CD + BD’ Complement 3 to obtain a simplified F in product-of-sums formF = (A’ + B’)(C’ + D’) (B’ + D)

  38. Product-of-Sums Simplification C B A D Simplify :F= (0,1,2,5,8,9,10)in Product-of-Sums Form Mark with 0’s the Maxterms of F Combine 0’s to obtain a simplified F’ in SOP. Complement 2 to obtain a simplified F in POS. F’ = AB + CD + BD’ F = (A’+B’)(C’+D’)(B’+D)

  39. Example 3-8 Simply Boolean function F(A, B, C, D) =(0, 1, 2,5, 8, 9, 10) in (a) sum of products and (b) product of sums (b) 1. Obtain simplified complemented function: (a) F = B’D’ F’ = AB + CD+BD’ + B’C‘ 2. Applying DeMorgan’s theorem to obtain F + A’C’D F = (A’ + B’) (C’+D’) (B’ + D) 39

  40. Gate Implementation for Example 3-8 40

  41. F(x, y, z) = (1, 3, 4, 6) = (0, 2, 5, 7) F(x, y, z) = (1, 3, 4, 6) = (0, 2, 5,7) F = x’z + xz‘ F’ = xz + x’z’  F = (x’ + z’)(x + z) 41

  42. 3.6 Don't Cares Condition Sometimes a function table or map contains entries for which it is known: the input values for the minterm will never occur, or The output value for the minterm is not used In these cases, the output value need not be defined Instead, the output value is defined as a “don't care” By placing “don't cares” ( an “x” entry) in the function table or map, the cost of the logic circuit may be lowered. Example 1: A logic function having the binary codes for the BCD digits as its inputs. Only the codes for 0 through 9 are used. The six codes, 1010 through 1111 never occur, so the output values for these codes are “x” to represent “don’t cares.”

  43. Example 3-9 product of sums? 43

  44. 3-7 NAND and NOR Implementation Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates 44

  45. NAND Circuits NAND gate: a universal gate – Any digital system can be implemented with it • including AND, OR and complement = 45

  46. Two-Level Implementation with NAND sum of product expression and its equivalent NAND implementation F = AB + CD = [(AB + CD)’]’ = [(AB)’*(CD)’]’ 46

  47. Example 3-10 Implement the following Boolean function with NAND gates 47

  48. Procedures of Implementation with two levels of NAND gates 1. Express simplified function in sum of products 2. Draw a NAND gate for each product term that has at least two literals to constitute a group of first-level gates 3. Draw a single gate using AND-invert or invert- OR in the second level 4. A term with a single literal requires an inverter in the first level 48

  49. Multilevel NAND Circuits 1. Convert all AND gates to NAND gates with AND-invert graphic symbols 2. Convert all OR gates to NAND gates with invert-OR graphic symbols 3. Check all the bubbles in the diagrams. For a single bubble, invert an inverter (one-input NAND gate) or complement the input literal ‘ 49

  50. Figure 3-23 Implementing F=(AB’ + A’B)(C+D’) 50

More Related