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Paralleling capacitors to reduce high frequency output voltage ripple

Paralleling capacitors to reduce high frequency output voltage ripple. 1. A technique for reducing High Frequency output noise. If the output capacitor(s) is not ceramic; then adding a small ceramic(s) in parallel with the output will reduce high frequency ripple.

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Paralleling capacitors to reduce high frequency output voltage ripple

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  1. Paralleling capacitors to reduce high frequency output voltage ripple 1

  2. A technique for reducing High Frequency output noise • If the output capacitor(s) is not ceramic; then adding a small ceramic(s) in parallel with the output will reduce high frequency ripple. • Choose a ceramic capacitor that has an impedance null (self resonance) that is the same as the frequency to be attenuated. • One, two or three small ceramics can give 10X improvement (-20 dB.)

  3. High frequency ripple Switch waveform (scope trigger) Vout ripple w/ 20 MHz bandwidth (bw) 5 mV /div  10 mv p-p HF spikes ignored !

  4. Use Zoom function to measure ring frequency Timebase Zoomed traces 20 MHz bw 10 mV/div  300MHz ring 200 MHz bw 100 mV/div 100 mV/div 2 GHz bw Need to add 470 pF 0603 bypass SRF ~ 300 MHz

  5. Continue the method Timebase Zoomed traces 20 MHz bw 10 mV/div  115 MHz ring 200 MHz bw 100 mV/div 100 mV/div 2 GHz bw Measured after adding a 470 pF 0603 but before adding 2200pF 0603

  6. Continue the method Timebase Zoomed traces 20 MHz bw 10 mV/div  60 MHz ring 200 MHz bw 100 mV/div 100 mV/div 2 GHz bw Measured after adding a 470pF 0603 and a 2200pF 0603 but before 4700pF 0805

  7. Results after 3rd added small capacitor 20 MHz bw 10 mV/div Ring ~377MHz 200 MHz bw 100 mV/div 100 mV/div 2 GHz bw Measured after adding a 470pF 0603, 2200pF 0603, and 4700pF 0805

  8. Final amplitude improvement results 20 MHz bw 10 mV/div 20 mV p-p @ 20MHz bw 200 MHz bw 80 mV p-p @ 200MHz bw 10 mV/div 10 mV/div 2 GHz bw After 470pF 2200pF 4700pF

  9. Starting point for comparison - 3 caps removed 10 mV/div 20 MHz bw 696mVp-p @ 200MHz bw 200 mV/div 200 MHz bw 2 GHz bw 200 mV/div

  10. Final schematic and bill of materials: 15 minutes later Cost Approx < $0.03 USD 1.2VDC OUT @ 5A 2200pF Remember to reserve locations on the schematic and PCB for these parts. You will not know the capacitor values until after you test the running power supply for ringing noise.  Plan ahead 

  11. Bench requirements • 2GHz bw / 20Gsps Digital oscilloscope with zoom feature and adjustable channel bandwidth. • Selection of small capacitors pre-characterized by Self Resonant Frequency. • High quality interconnections with controlled impedances. Example of 3 channel input adapter built for this tutorial (net 4x passive probe)

  12. Use C0G (NP0) dielectric for high frequency shunt filter capacitors – lower ESR – more stable over temp Start with manufacturer data sheets, then measure SRF on bench to confirm 12

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