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Cooling Circuit Water Leak Incident Report

Approximately 100 liters of water leaked from the cooling circuit at Point 5 but has been identified and repaired. Current power at Point 5 is off pending discussion on reactivation plans. Recent activities by G. Rakness at UCLA include addressing RPC efficiency issues and starting ALCT calibrations at 904. This week, there were several system adjustments to align ALCT BC0 and optimize trigger control settings.

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Cooling Circuit Water Leak Incident Report

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  1. Water leak at point 5 • ~100L of H2O leaked from the cooling circuit at top of YE+1 • Found and fixed… • Currently all power is off at point 5 • To discuss tomorrow how / when to turn back on… G. Rakness (UCLA)

  2. Some things that were done this week • Met with Camilo Carillo to give him the RAT efficiency code so he can measure the RPC efficiency with RAT data • The RPC folks have uncontrolled systematics in their endcap efficiency determination • Helped Alex Madorsky start ALCT calibrations at 904 • Re-established timing parameters at 904. The parameters are comparable to what we have at point 5. • Local Trigger Control (LTC) module configuration equivalent to what is used for local runs at point 5 • Fiber lengths are within the ensemble of what we have at point 5 • N.B. 904 is plagued by unstable cooling and unstable power from DSS+Magelis (CSC and HCAL currently getting all power from the wall) G. Rakness (UCLA)

  3. G. Rakness (UCLA)

  4. ALCT bx0 delay scan ********************************** Scan to align ALCT BC0 back at TMB ********************************** This scan has the following input parameters... alct_tof_delay = 0x6 tmb_to_alct_data_delay = 0x0 Using tmb_bxn_offset = 3540 Scanning alct_bx0_delay from 0 to 16 alct_bx0_delay[0] = 0 alct_bx0_delay[1] = 0 alct_bx0_delay[2] = 0 alct_bx0_delay[3] = 0 alct_bx0_delay[4] = 0 alct_bx0_delay[5] = 0 alct_bx0_delay[6] = 0 alct_bx0_delay[7] = 0 alct_bx0_delay[8] = 0 alct_bx0_delay[9] = 100 alct_bx0_delay[10] = 0 alct_bx0_delay[11] = 0 alct_bx0_delay[12] = 0 alct_bx0_delay[13] = 0 alct_bx0_delay[14] = 0 alct_bx0_delay[15] = 0 Best value is alct_bx0_delay = 9 G. Rakness (UCLA)

  5. L1A and DAV delays parameter 4 June 2009 value 7 Oct 2009 value --------- ----------- ----------- tmb_l1a_delay 121 121 alct_l1a_delay 148 149 tmb_lct_cable_delay 3 3 alct_dav_cable_delay 2 1 cfeb_dav_cable_delay 1 1 Note: alct_dav_cable delay changing may require a different CFEB version… G. Rakness (UCLA)

  6. TMB Counters over 1000 seconds at 904 4 June 2009 firmware 7 Oct 2009 firmware 0ALCT: alct0 valid pattern flag received 7141 1ALCT: alct1 valid pattern flag received 94 2ALCT: alct data structure error 0 3ALCT: trigger path ECC; 1 bit error corrected 0 4ALCT: trigger path ECC; 2 bit error uncorrected 0 5ALCT: trigger path ECC; > 2 bit error uncorrected 0 6ALCT: trigger path ECC; > 2 bit error blanked 0 7ALCT: alct replied ECC; 1 bit error corrected 0 8ALCT: alct replied ECC; 2 bit error uncorrected 0 9ALCT: alct replied ECC; > 2 bit error uncorrected 0 10ALCT: raw hits readout 51 11ALCT: raw hits readout - CRC error 0 12 11244439 13CLCT: Pretrigger 926 14CLCT: Pretrigger on CFEB0 228 15CLCT: Pretrigger on CFEB1 137 16CLCT: Pretrigger on CFEB2 218 17CLCT: Pretrigger on CFEB3 118 18CLCT: Pretrigger on CFEB4 246 19CLCT: Pretrigger on ME1A CFEB 4 only 0 20CLCT: Pretrigger on ME1B CFEBs 0-3 only 0 21CLCT: Discarded, no wrbuf available, buffer stalled 0 22CLCT: Discarded, no ALCT in window 0 23CLCT: Discarded, CLCT0 invalid pattern after drift 777 24CLCT: CLCT0 pass hit thresh, fail pid_thresh_postdrift 0 25CLCT: CLCT1 pass hit thresh, fail pid_thresh_postdrift 0 26CLCT: BX pretrig waiting for triads to dissipate 1726 27CLCT: clct0 sent to TMB matching section 149 28CLCT: clct1 sent to TMB matching section 5 29TMB: TMB accepted alct*clct, alct-only, or clct-only 51 30TMB: TMB clct*alct matched trigger 51 31TMB: TMB alct-only trigger 0 32TMB: TMB clct-only trigger 0 33TMB: TMB match reject event 98 34TMB: TMB match reject event, queued for nontrig readout0 35TMB: TMB matching discarded an ALCT pair 0 36TMB: TMB matching discarded a CLCT pair 0 37TMB: TMB matching discarded CLCT0 from ME1A 0 38TMB: TMB matching discarded CLCT1 from ME1A 0 0ALCT: alct0 valid pattern flag received 6966 1ALCT: alct1 valid pattern flag received 86 2ALCT: alct data structure error 0 3ALCT: trigger path ECC; 1 bit error corrected 0 4ALCT: trigger path ECC; 2 bit error uncorrected 0 5ALCT: trigger path ECC; > 2 bit error uncorrected 0 6ALCT: trigger path ECC; > 2 bit error blanked 0 7ALCT: alct replied ECC; 1 bit error corrected 0 8ALCT: alct replied ECC; 2 bit error uncorrected 0 9ALCT: alct replied ECC; > 2 bit error uncorrected 0 10ALCT: raw hits readout 86 11ALCT: raw hits readout - CRC error 0 12 11244426 13CLCT: Pretrigger 1210 14CLCT: Pretrigger on CFEB0 315 15CLCT: Pretrigger on CFEB1 186 16CLCT: Pretrigger on CFEB2 236 17CLCT: Pretrigger on CFEB3 226 18CLCT: Pretrigger on CFEB4 269 19CLCT: Pretrigger on ME1A CFEB 4 only 0 20CLCT: Pretrigger on ME1B CFEBs 0-3 only 0 21CLCT: Discarded, no wrbuf available, buffer stalled 0 22CLCT: Discarded, no ALCT in window 0 23CLCT: Discarded, CLCT0 invalid pattern after drift 949 24CLCT: CLCT0 pass hit thresh, fail pid_thresh_postdrift 0 25CLCT: CLCT1 pass hit thresh, fail pid_thresh_postdrift 0 26CLCT: BX pretrig waiting for triads to dissipate 2342 27CLCT: clct0 sent to TMB matching section 261 28CLCT: clct1 sent to TMB matching section 3 29TMB: TMB accepted alct*clct, alct-only, or clct-only 86 30TMB: TMB clct*alct matched trigger 86 31TMB: TMB alct-only trigger 0 32TMB: TMB clct-only trigger 0 33TMB: TMB match reject event 175 34TMB: TMB match reject event, queued for nontrig readout0 35TMB: TMB matching discarded an ALCT pair 0 36TMB: TMB matching discarded a CLCT pair 0 37TMB: TMB matching discarded CLCT0 from ME1A 0 38TMB: TMB matching discarded CLCT1 from ME1A 0 G. Rakness (UCLA)

  7. TMB Counters over 1000 seconds at 904 4 June 2009 firmware 7 Oct 2009 firmware 39TMB: Matching found no ALCT 0 40TMB: Matching found no CLCT 0 41TMB: Matching found one ALCT 45 42TMB: Matching found one CLCT 48 43TMB: Matching found two ALCTs 6 44TMB: Matching found two CLCTs 3 45TMB: ALCT0 copied into ALCT1 to make 2nd LCT 1 46TMB: CLCT0 copied into CLCT1 to make 2nd LCT 4 47TMB: LCT1 has higher quality than LCT0 (ranking error) 0 48TMB: Transmitted LCT0 to MPC 51 49TMB: Transmitted LCT1 to MPC 7 50TMB: MPC accepted LCT0 51 51TMB: MPC accepted LCT1 7 52TMB: MPC rejected both LCT0 and LCT1 0 53L1A: L1A received 51 54L1A: L1A received, TMB in L1A window 51 55L1A: L1A received, no TMB in window 0 56L1A: TMB triggered, no L1A in window 0 57L1A: TMB readouts completed 51 58STAT: CLCT Triads skipped 142 59STAT: Raw hits buffer had to be reset 0 60STAT: TTC Resyncs received 0 61STAT: Sync Error, BC0/BXN=offset mismatch 0 62STAT: Parity Error in CFEB or RPC raw hits RAM 0 63HDR: Pretrigger counter 1189 64HDR: CLCT counter 197 65HDR: TMB trigger counter 76 66HDR: ALCTs received counter 9151 67HDR: L1As received counter (12 bits) 76 68HDR: Readout counter (12 bits) 76 69HDR: Orbit counter 14298133 70ALCT:Struct Error, expect ALCT0[10:1]=0 when alct0vpf=0 0 71ALCT:Struct Error, expect ALCT1[10:1]=0 when alct1vpf=0 0 72ALCT:Struct Error, expect ALCT0vpf=1 when alct1vpf=1 0 73ALCT:Struct Error, expect ALCT0[10:1]>0 when alct0vpf=1 0 74ALCT:Struct Error, expect ALCT1[10:1]>0 when alct1vpf=1 0 75CCB: TTCrx lock lost 0 76CCB: qPLL lock lost 0 39TMB: Matching found no ALCT 0 40TMB: Matching found no CLCT 0 41TMB: Matching found one ALCT 75 42TMB: Matching found one CLCT 84 43TMB: Matching found two ALCTs 11 44TMB: Matching found two CLCTs 2 45TMB: ALCT0 copied into ALCT1 to make 2nd LCT 0 46TMB: CLCT0 copied into CLCT1 to make 2nd LCT 9 47TMB: LCT1 has higher quality than LCT0 (ranking error) 0 48TMB: Transmitted LCT0 to MPC 86 49TMB: Transmitted LCT1 to MPC 11 50TMB: MPC accepted LCT0 86 51TMB: MPC accepted LCT1 11 52TMB: MPC rejected both LCT0 and LCT1 0 53L1A: L1A received 86 54L1A: L1A received, TMB in L1A window 86 55L1A: L1A received, no TMB in window 0 56L1A: TMB triggered, no L1A in window 0 57L1A: TMB readouts completed 86 58STAT: CLCT Triads skipped 150 59STAT: Raw hits buffer had to be reset 0 60STAT: TTC Resyncs received 0 61STAT: Sync Error, BC0/BXN=offset mismatch 0 62STAT: Parity Error in CFEB or RPC raw hits RAM 0 63HDR: Pretrigger counter 1266 64HDR: CLCT counter 273 65HDR: TMB trigger counter 94 66HDR: ALCTs received counter 7326 67HDR: L1As received counter (12 bits) 94 68HDR: Readout counter (12 bits) 94 69HDR: Orbit counter 11807420 70ALCT:Struct Error, expect ALCT0[10:1]=0 when alct0vpf=0 0 71ALCT:Struct Error, expect ALCT1[10:1]=0 when alct1vpf=0 0 72ALCT:Struct Error, expect ALCT0vpf=1 when alct1vpf=1 0 73ALCT:Struct Error, expect ALCT0[10:1]>0 when alct0vpf=1 0 74ALCT:Struct Error, expect ALCT1[10:1]>0 when alct1vpf=1 0 75CCB: TTCrx lock lost 0 76CCB: qPLL lock lost G. Rakness (UCLA)

  8. To Do • Write DPF proceedings • Meet with Jay and Alex and Lev (in town) tomorrow afternoon about BC0 • Test TMB firmware at p5 (?) • Give talk for CSC plans for first beams at Run Meeting G. Rakness (UCLA)

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