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Top-down modular design

Top-down modular design. Decoders. n -to-2 n decoder: logic network with n inputs and 2 n outputs. One output is active for each of the 2 n input combinations  each minterm Decoder  minterm generator Most common use: Memory selection. Decoders.

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Top-down modular design

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  1. Top-down modular design

  2. Decoders • n-to-2n decoder: logic network with n inputs and 2n outputs. • One output is active for each of the 2n input combinations  each minterm • Decoder  minterm generator • Most common use: • Memory selection

  3. Decoders • Parallel decoders (a) active-high (b) active-low

  4. Decoders • Parallel is expensive • Problem extending for larger n • 2n decoders require n-input ANDs: fan-in • Alternative: (c) alternate structure

  5. Decoders: (a) parallel (b) tree

  6. Decoders • Tree decoders – constant fan-in: 2-input gates throughout • Compare the number of gates required for (a) and (b) • Dual tree decoders • n inputs divided into 2 groups j and k; • n = j+k • j-input decoder  2j outputs • k-input decoder  2k outputs • Array of 2j * 2k = 2n 2-input ANDs

  7. Decoders • Why decision tree: @a @a @a @a @a@a @a@a @a@a@a@a

  8. Decoders: (c) dual tree • n=4 • j=k=2

  9. Implementing logic functions using Decoders Since , each output can be considered a maxterm.

  10. Logic functions using Decoders

  11. Logic functions using Decoders • Active-high decoder with OR gate (a) • Active-low decoder with NAND gate (b)

  12. Logic functions using Decoders • Active-high decoder with NOR gate (c) • Active-low decoder with AND gate (d)

  13. Decoders Active-high decoder with enable (a) Symbol (b) • Function:

  14. Decoders • 3  8 decoder using two 2  4 decoders with enable

  15. Decoders • 4  16 decoder using 2  4 decoders with enable

  16. Encoders • Opposite of decoder: one output code (binary) for each input; assumes one input active at a time • n inputs; s outputs • n≤ 2s • s ≥ log2n; usually s = log2n • 4:2 encoder with exclusive inputs: functional diagram

  17. Encoders • K-Maps of the 4:2 encoder outputs

  18. Encoders • Logic diagram and Truth table of the 4:2 encoder

  19. Encoders • Functional diagram and Truth table of the 4:3 encoder • Outputs Zero unless exactly one line is active high

  20. Encoders • K-Maps of the outputs of the 4:3 encoder

  21. Encoders • Logic diagram of the 4:3 encoder

  22. Encoders • 4:2 priority encoder • No input active  EO = 1 • At least one input active  GS = 1 • If more than one input active  output the one with highest priority • 3 > 2 > 1 > 0 • Useful in resourcemanagementrequest /acknowledgecircuits incomputers

  23. Encoders • K-Maps of the 4:2 priority encoder outputs

  24. Encoders • Logic diagram and Truth table of the 4:2 priority encoder

  25. Multiplexers • Connects one of the inputs to the output • Needs log2n select lines

  26. Multiplexers • Easy to realize in CMOS

  27. Multiplexers • Question: we want a 8:1 MUX using 4:1s as building blocks

  28. Demultiplexers • Connects the input to one of the outputs • Needs log2n select lines

  29. Demultiplexers • Where is it useful?

  30. Adders • Often realized as “bit slice”s • Bit slice: module that handles one bit position • Can be replicated (arrayed) • Array handles n bits (the whole number) • Bit slice: Half Adder • Given two input bits, produces sum and carry

  31. Adders • Bit slice: Full Adder • Given two input bits and carry in, produces sum and carry

  32. Adders • Pseudo parallel (ripple carry) Adder

  33. Adders • Two-bit “parallel” Adder

  34. Adders • Four-bit “parallel” Adder • What is the difficulty with n-bit parallel adders?

  35. Adders • Parallel Adder carry logic: growing impractically • Generate Propagate

  36. Adders • Expanding the carry expressions yields or, generalized:

  37. Adders • When there is carry-in, it becomes c0, and renumbering the terms yields: • Can form groups of 4:

  38. Adders • Using the group carries: • Generate and propagate are from one bit so far • Can extend the idea to groups of bit positions

  39. Adders • The group carry, generate and propagate are: • The groups can be adjoining or overlappinge.g.

  40. Adders • Subtraction is addition • Two-s complement • Bitwise invert B and set the carry-in c0=1

  41. Adders • Overflow detection

  42. Adders • Overflow detection

  43. Comparators

  44. Comparators • Example: 2-bit comparator

  45. Comparators • K-Maps of the comparator outputs

  46. Comparators • Example: MIS 4-bit magnitude comparator

  47. Comparators • 4-bit magnitude comparator function table

  48. Comparators • Cascading 4-bit comparators to obtain a 16-bit comparator

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