Chapter 8 I/O Programming Chapter 9 Trap Service Routines

1. Chapter 8 I/O ProgrammingChapter 9Trap Service Routines • Programmed I/O • Interrupts • Interrupt Driven I/O • Trap Service Routines

2. Input/Output Addressing • Memory Mapped I/O • A section of the memory address space is reserved for I/O Registers rather than general memory locations. Think of it as “pseudo” memory. The same instructions are used for general programming and I/O programming. • Non-Memory Mapped I/O • There is a separate address space for I/O programming, and an entirely separate set of I/O Instructions.

3. Synchronous vs Asynchronous I/O • Synchronous • Latest value of data could be expected to be available when the program wanted it. • It might be periodically updated at a known frequency. • This is not typical nor usually realistic for I/O. • Asynchronous • Computer is generally much faster than I/O so program must wait until requested data is available or data provided has been taken. • “Handshaking” is used to ensure that data is available or I/O device is ready.

4. LC-3 Memory Map (64K of 16 bit words) 256 words 256 words 23.5 K words 39.5 K words 512 words

5. LC-3 has Memory Mapped I/O LC-3 Memory Layout: x0000 – x00FF Trap vectors (Supports Software Interrupts) x0020 [x0400] GETC (Read Char from Keyboard) x0021 [x0430] OUT (Write Character to Console) x0022 [x0450] PUTS (Write string to Console) x0023 [x04A0] IN (Prompt, input character from Keyboard, echo character to Console) x0024 [x04E0] PUTSP (Write “packed” string to Console) x0025 [xFD70] HALT (Turn off run latch in MCR) x0100 – x01FF Interrupt Vectors (Supports Hardware Interrupts) x0200 – x2FFF System Programs & Data (“Operating System”) x3000 – xFDFF User Programs Area xFE00 – xFFFF I/O Programming “Registers” (Mapped I/O Regs) xFE00 KBSR [15 {Ready}, 14 {Intr enable}] (Keyboard Status Register) xFE02 KBDR [7:0{ascii data}] (Keyboard Data Register) xFE04 DSR [15{Done}, 14{Intr enable}] (Display Status Register) xFE06 DDR [7:0{ascii data}] (Display Data Register xFFFE MCR [15{Run latch}] (Machine Control Register)

6. The LC-3 Computer & I/O PSW I/O Memory PSW (Program Status Word): Bits: 15 10 9 8 2 1 0 | S| |Priority| | N| Z| P|

7. LC-3 Memory Mapped I/O

8. Polling vs Interrrupt Driven I/O • Polling I/O • Program initiates I/O and then checks regularly to see if I/O is completed. (typically a loop in the program) • Interrupt Driven I/O • Program initiates I/O and goes to sleep until the CPU wakes up the program to say that I/O is completed. (instead of going to sleep, the CPU may do something else before the wake up call)

9. Handshaking Communications • A Paradigm Used in Asynchronous Communications • Typical sequence: • Initiate I/O Request (send signal to I/O device) • Loop checking for I/O complete (check for returned signal) • Continue Program (perhaps Initiate another I/O Request) • Etc.

10. Keyboard Input Interface

11. Keyboard Input Registers KBDR (Keyboard Data Register): Assigned to address xFE02 Data is in KBDR[7:0] Read only Register KBSR (Keyboard Status Register): Assigned to address xFE00 Status “ready” is KBSR[15] Set to “1” when new data is ready (Set by Keyboard) Cleared when data is read (Cleared when user reads data)

12. Simple Polling Program for Input from Keyboard ; Waiting for a character to be entered START LDI R1, KBSR ; Test for character input BRzp START ; If not here, try again LDI R0, KBDR ; Read character BRnzp NEXT_TASK ; Go to the next task ~ ~ KBSR .FILL xFE00 ; Address of KBSR (Keyboard Status Register) KBDR .FILL xFE02 ; Address of KBDR (Keyboard Data Register) xFE02 xFE00

13. Console Output Interface

14. Console (Monitor) Output Registers DDR (Display Data Register): Assigned to Address xFE06 Data is in DDR[7:0] DSR (Data Status Register): Assigned to Address xFE04 Status “done” bit is DSR[15] Set to “1” when data is picked up Cleared when new data is written

15. Simple Polling Program to Output to Console ; Wait for write to Console done START LDI R1, DSR ; Test for output written BRzp START ; If not done, try again STI R0, DDR ; Write character BRnzp NEXT_TASK ; Go to next task ~ ~ DSR .FILL xFE04 ; Address of DSR (Display Status Register) DDR .FILL xFE06 ; Address of DDR (Display Data Register) FE06 FE04

16. Program to Echo from Keyboard to Monitor ; Echo keyboard input to Console output START LDI R1, KBSR ; Test for input ready BRzp START LDI R0, KBDR ECHO LDI R1, DSR ; Test for output done BRzp ECHO STI R0, DDR BRnzp NEXT_TASK KBSR .FILL xFE00 ; Address of KBSR KBDR .FILL xFE02 ; Address of KBDR DSR .FILL xFE04 ; Address of DSR DDR .FILL xFE06 ; Address of DDR

17. A “Complete” I/O Routine to Echo a Line of Input .orig x3000 ; Program to read and echo line from the Console ST R1, SaveR1 ; Save registers needed ST R2, SaveR2 ; by this routine ST R3, SaveR3 LD R2, Newline ; Store newline Character in R2 L1 LDI R3, DSR ; Loop until Monitor is done BRzp L1 STI R2, DDR ; Move cursor to new clean line LEA R1, Prompt ; Load starting address of prompt string Loop LDR R0, R1, #0 ; Get prompt character BRz Input ; Branch to Loop on null (0) L2 LDI R3, DSR ; Loop until Monitor is done BRzp L2 STI R0, DDR ; Write prompt character ADD R1, R1, #1 ; Increment Prompt pointer BRnzp Loop ; Go to get next prompt character

18. A “Complete” I/O Routine to Echo a Line of Input (2) Input LDI R3, KBSR ; Poll until a character is typed BRzp Input LDI R0, KBDR ; Get input character L3 LDI R3, DSR ; Loop until Monitor is done BRzp L3 STI R0, DDR ; Echo input character ADD R0, R0, #-10 ; Test for newline (done) BRnp Input ; Loop if not done L4 LDI R3, DSR ; Loop until Monitor is done BRzp L4 STI R2, DDR ; Move cursor to new clean line LD R1, SaveR1 ; Restore registers LD R2, SaveR2 ; to original values LD R3, SaveR3 BRnzp NEXT_TASK ; Do the program's next task

19. A “Complete” I/O Routine to Echo a Line of Input (3) SaveR1 .BLKW 1 ; Memory for registers saved SaveR2 .BLKW 1 SaveR3 .BLKW 1 DSR .FILL xFE04 DDR .FILL xFE06 KBSR .FILL xFE00 KBDR .FILL xFE02 Newline .FILL x000A ; ASCII code for newline Prompt .STRINGZ "Input character line> " NEXT_TASK BRnzp NEXT_TASK ; Simulates next task .END

20. I/O Interrupts Requirements for a device to interrupt the processor • The device must have the right to request service • The I/O device must want service • The device request must be at a higher priority than what is being done by the processor or is being requested by other devices • The processor must be completed with the present instruction execution

21. Device(s) Generating Interrupt Service Request to the CPU Keyboard: Monitor: Done/Ready bit is “anded” with the Interrupt Enable bit to produce an interrupt request signal

22. Generating the LC-3 Interrupt Request to the CPU Interrupt Vectors are: x0100 to x01FF (x0180 is for the Keyboard)

23. Servicing an Interrupt The following process is followed to service an interrupt: • The CPU enters the Supervisor State (PSW Bit 15 set to 0) • The “context” of the present program is saved (PC, PSW, SP) (Why?) • The device provides the address of location in the interrupt service routine table where the pointer to the service routine should reside. (x0180 is the Interrupt Vector for the Keyboard Interrupt Service Routine) • The Supervisor loads the address of the service routine into the PC • The service routine is executed ending with an RTI (Any registers used will be saved and restored) • The context of the original program is reloaded, and • The original program resumes

24. Trap Routines • Programming Trap Service Routines • Writing the code for them

25. Trap Routines Trap Instruction: TRAP x 1111 0000 trap vector F0xx [PC ] R7 Jump to routine at trap vector address Return: RET 1100 000 111 000000 C1C0 [R7]  PC (JMP R7) Some Conventions (For the LC-3): Data passed (read & write) in R0, Error messages returned in R5

26. Trap Process • Execute TRAP “vector” - Service Routine Addresses Trap Vectors are at memory locations [0000:00FF] Trap Vectors contain addresses of “Pre written (?)” Service Routines 2) [PC] is stored in R7 3) Address of Trap Service Routine loaded into PC • Service Routine Program executed • Trap service routine program ends with an RET ([R7] loaded into PC)

27. TRAP x21 OUT Trap Vector Routine (Output Character) ; out.asm ; .ORIG x0430 ; System call starting address ST R1, SaveR1 ; R1 will be used to poll the DSR ; hardware ; ; Write the character ; TryWrite LDI R1, DSR ; Get status BRzp TryWrite ; Bit 15 on says display is ready WriteIt STI R0, DDR ; Write character ; ; Return from trap ; Return LD R1, SaveR1 ; Restore registers RET ; Return from trap (JMP R7, actually) ; DSR .FILL xFE04 ; Address of display status register DDR .FILL xFE06 ; Address of display data register SaveR1 .BLKW 1 ; Save area for R1 .END

28. TRAP x23IN Trap Service Routine (Input Character) ; in.asm Service Routine for Keyboard Input ; .ORIG x04A0 START ST R1,SaveR1 ; Save the register values ST R2,SaveR2 ; that are used so that they ST R3,SaveR3 ; can be restored before RET ; LD R2,Newline L1 LDI R3,DSR ; Check DDR -- is it free? BRzp L1 STI R2,DDR ; Move cursor to new clean line ; LEA R1,Prompt ; Prompt is starting address ; of prompt string Loop LDR R0,R1,#0 ; Get next prompt character BRz Input ; Check for end of prompt string L2 LDI R3,DSR BRzp L2 STI R0,DDR ; Write next character of ; prompt string ADD R1,R1,#1 ; Increment Prompt pointer BRnzp Loop ; Input LDI R3,KBSR ; Has a character been typed? BRzp Input LDI R0,KBDR ; Load it into R0 L3 LDI R3,DSR BRzp L3 STI R0,DDR ; Echo input character ; to the monitor ; L4 LDI R3,DSR BRzp L4 STI R2,DDR ; Move cursor to new clean line LD R1,SaveR1 ; Service routine done, restore LD R2,SaveR2 ; original values in registers. LD R3,SaveR3 RET ; Return from trap (i.e., JMP R7) ; SaveR1 .BLKW 1 SaveR2 .BLKW 1 SaveR3 .BLKW 1 DSR .FILL xFE04 DDR .FILL xFE06 KBSR .FILL xFE00 KBDR .FILL xFE02 Newline .FILL x000A ; newline (ASCII) Prompt .STRINGZ "Input a character>" .END

29. TRAP x25HALT Service Routine ; halt.asm Halts the program ; .ORIG xFD70 ; Where this routine resides ST R7, SaveR7 ST R1, SaveR1 ; R1: a temp for MC register ST R0, SaveR0 ; R0 is used as working space ; print message that machine is halting LD R0, ASCIINewLine TRAP x21 LEA R0, Message TRAP x22 LD R0, ASCIINewLine TRAP x21 ; ; clear bit 15 at xFFFE to stop the machine ; LDI R1, MCR ; Load MC register into R1 LD R0, MASK ; R0 = x7FFF AND R0, R1, R0 ; Mask to clear the top bit STI R0, MCR ; Store R0 into MC register ; ; return from HALT routine. ; (how can this routine return if the machine is halted above?) ; LD R1, SaveR1 ; Restore registers LD R0, SaveR0 LD R7, SaveR7 RET ; JMP R7, actually ; ; Some constants ; ASCIINewLine .FILL x000A SaveR0 .BLKW 1 SaveR1 .BLKW 1 SaveR7 .BLKW 1 Message .STRINGZ "Halting the machine." MCR .FILL xFFFE ; Address of MCR MASK .FILL x7FFF ; Mask to clear the top bit .END

30. TRAP 22 PUTS Trap Service Routine (Output a Character String) ; puts.asm Output a Character String ; This service routine writes a NULL-terminated string to the console. ; It services the PUTS service call (TRAP x22). ; Inputs: R0 is a pointer to the string to print. ; Context Information: R0, R1, and R3 are saved, and R7 is lost ; in the jump to this routine ; .ORIG x0450 ; Where this Service Routine resides ST R7, SaveR7 ; Save R7 for later return ST R0, SaveR0 ; Save other registers that are used by this routine ST R1, SaveR1 ST R3, SaveR3 ; ; Loop through each character in the array ; ; Loop LDR R1, R0, #0 ; Retrieve the character(s) BRz Return ; If it is 0, done L2 LDI R3,DSR BRzp L2 STI R1, DDR ; Write the character ADD R0, R0, #1 ; Increment pointer BRnzp Loop ; Do it all over again ; ; Return from the request for service call Return LD R3, SaveR3 ; Restore Registers LD R1, SaveR1 LD R0, SaveR0 LD R7, SaveR7 RET ; ; Register locations DSR .FILL xFE04 DDR .FILL xFE06 SaveR0 .FILL x0000 SaveR1 .FILL x0000 SaveR3 .FILL x0000 SaveR7 .FILL x0000 .END