Tutorial 5: Simulating a Design

1. Tutorial 5:Simulating a Design

2. Introduction • This tutorial covers how to perform a functional simulation as well as a timing simulation with the Xilinx software. • A one-bit comparator was chosen as the example circuit.

3. One-Bit Comparator

4. Opening the Simulator • Simulation Icon • Tools -> Simulation/Verification -> Gate Simulator • Update Netlist

5. Selecting input and output signals • Chip Icon • Signal -> Add Signal

7. Component Selection • Select Inputs and Outputs • Add button • Double-Clicking • Close button

9. Test Pins • SC button • Tools -> Schematic Capture • Simulation Toolbox Icon • Mode -> Testpoint • Click on net name to create probe • Sim Icon to return

11. Adding Stimuli • Stimulator icon • Signal -> Add Stimulators • Binary Counter to mark inputs • Close Stimulator window

13. Defining the Frequency of the free-running Counter • Options -> Preferences • B0 Period drop-down list • B0 Frequency adjusts automatically

15. Doing the Simulation and Viewing the Waveforms • “Functional” from pull down menu • Simulation Step (footstep) • Adjust step size with pull down menu • Ruler Icon – adjust scale of time axis

17. Schematic Simulation • SC Icon • Logic Values of each signal • Gray Boxes -> Colored Boxes

19. Timing Simulation • Detailed information of timing delays • First implement design – Implementation Icon • Verification Button (Timing Simulation) • Select components from Signals Selection and Chip Selection • Close to return

21. Doing the Simulation and Measuring Delays • “Timing” from pull down menu • Step Icon (footsteps) • Measure Delay – Waveform -> Measurements -> Measurements on • Select start and end points