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This article presents a design method for a regular expression matching circuit based on a decomposed automaton. The circuit reduces the number of logic cells, resulting in cost reduction. The article explains the realization of a merged-states non-deterministic finite automaton with unbounded string transitions using a DFA and an NFA. It also discusses the design of transition string detection and state transition circuits. The experimental results show the effectiveness of the proposed method using SNORT regular expressions on a Xilinx Spartan III FPGA.
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A Design Method of a Regular Expression Matching Circuit Based on Decomposed Automaton Author: Hiroki Nakahara, Tsutomu Sasao and Munehiro Matsuura Publisher: IEICE TRANS. INF.& SYST., 2012 Presenter: Li-Hsien, Hsu Data: 4/25/2012
Introduction • The cost for the FPGA is proportional to the number of LCs(logic cells), reduction of the number of LCs means reduction of the system cost.
MNFAU (Merged-states non-deterministic finite automaton with unbounded string transition)
Realization of MNFAU • An MNFAU is decomposed into a DFA and an NFA.
Realization of MNFAU • Transition string detection circuit Since each state of the MNFAU consists of different number of states of the NFA, lengths of the transition strings for states of the MNFAU are different. To detect multiple strings with different lengths, we use the Aho-Corasick DFA.
Realization of MNFAU • State transition circuit When the AC-DFA detects the transition string, a detection signal is sent to the state transition circuit. Then, the state transition is performed.
Experimental Results • We selected regular expressions from SNORT. • Xilinx Spartan III FPGA • The total number of regular expression is 1114. • This implementation requires 19522 LCs, and an off-chip memory of 16 Mbits.