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Control signals

Control signals. ALU Control. Assume ALUOp has been determined as such for each instruction. Truth Table. Note that only the entries for which the control is asserted are shown. One Implementation. The Effect of Control Signals. Table for Control Line Setting.

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Control signals

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  1. Control signals

  2. ALU Control Assume ALUOp has been determined as such for each instruction week-13-3.ppt

  3. Truth Table Note that only the entries for which the control is asserted are shown week-13-3.ppt

  4. One Implementation

  5. The Effect of Control Signals

  6. Table for Control Line Setting

  7. Table for Control Line Setting

  8. Truth Table for Control Function

  9. Implementation Using PLA

  10. Jump Instruction • Jump instruction seems easy to implement • We just need to replace the lower 28 bits of the PC with the lower 26 bits of the instruction shifted by 2 bits • The shift is achieved by simply concatenating 00 to the jump offset week-13-3.ppt

  11. 31 26 25 0 0 0 0 0 1 0 opcode Address Implementing Jumps • The one we have supports arithmetic/logic instructions, branch instructions, load and store instructions • We need also to support the jump instruction • What are the changes we need to make?

  12. Supporting Jump Instruction

  13. Supporting Jump Instruction

  14. Supporting Jump Instruction

  15. Supporting Jump Register week-14-1.ppt

  16. What need to be done?

  17. Supporting Jump Register week-14-1.ppt

  18. Final • Final is going to be on Wednesday between 12:30 - 2:30 p.m., in the same classroom. • It will cover both before the midterm and after the midterm. • It will consist of around 10 multiple choice questions and around 3 short answer questions.

  19. Final • Topics: • Number representation • 2’ complement, float number… • MIPS coding • function call, stack, instruction encoding … • There will be a short answer question on MIPS coding • Basic digital logic design • truth table, K-map, dff, finite state machine… • There will be at least one short answer question on this • Processor data path design • There will be at least one short answer question on this

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