850 likes | 1.57k Views
Nanoelectronic Devices. Gregory L. Snider Department of Electrical Engineering University of Notre Dame. What are Nanoelectronic Devices?. A rough definition is a device where: The wave nature of electrons plays a significant (dominant) role.
E N D
Nanoelectronic Devices Gregory L. Snider Department of Electrical Engineering University of Notre Dame
What are Nanoelectronic Devices? A rough definition is a device where: • The wave nature of electrons plays a significant (dominant) role. • The quantized nature of charge plays a significant role.
Examples • Quantum point contacts (QPC) • Resonant tunneling diodes (RTD) • Single-electron devices • Quantum-dot Cellular Automata (QCA) • Molecular electronics (sometimes not truly nano)
References • Single Charge Tunneling, H. Grabet and M. Devoret, Plenum Press, New York, 1992 • Modern Semiconductor Devices, S.M. Sze, John Wiley and Sons, New York, 1998 • Theory of Modern Electronic Semiconductor Devices, K. Brennan and A. Brown, John Wiley and Sons, New York, 2002 • Quantum Semiconductor Structures, Fundamentals and Applications , C. Weisbuch and B. Vinter, Academic Press, Inc., San Diego, 1991
When does Quantum Mechanics Play a Role? W & V, pg. 12, Fig. 5
More Realistic Confinement W & V, pg. 13, Fig.6
Quantum Point Contacts One of the earliest nanoelectronic devices QPCs depend on ballistic, wave-like transport of carriers through a constriction. In the first demonstration surface split- gates are used to deplete a 2D electron gas. The confinement in the constriction produces subbands.
Quantized Conductance When a bias is applied from source to drain electrons travel ballisticly. Each spin-degenerate subband can provide 2e2/h of conductance. Va Wees, PRL 60, p. 848, 1988
What About Temperature? Thermal energy is the bane of all nanoelectronic devices. T2 > T1 As the temperature increases more subbands become occupied, washing out the quantized conductance. All nanoelectronic devices have a characteristic energy that must be larger than kT
Resonant Tunnel Devices In a finite well the wavefunction penetrates into the walls, which is tunneling In the barrier: where Transmission through a single barrier goes as:
Two Barriers Semiclassically a particle in the well oscillates with: It can tunnel out giving a lifetime tn and: Now make a particle incident on the double barrier: If Ei ≠ En then T = T1T2 which is small
If Ei = En then the wavefunction builds in the well, as in a Fabry-Perot resonator: Which approaches unity for T1 = T2:
where In Real Life! Things are, of course, more complicated: - No mono-energetic injection - Other degrees of freedom In the well: In the leads:
In k Space No One Can Hear You Scream! For Transmission: To get through the barriers electrons must have E > Ec but must also have the correct kz. Only states on the disk meet these criteria.
EcL is above Eo, so no states have the correct kz J is proportional to the number of states on the disk, and therefore to the area of the disk: Note: we have ignored the transmission probability
Scattering Scattering plays an important but harmful role, mixing in-plane and perpendicular states B&B p236
The energy required to add one more electron to the island is: e2 EC = 2C This is the Charging Energy Single Electron Devices The most basic single-electron device is a single island connected to a lead through a tunnel junction If EC > kT then the electron population on the island will be stable. Usually we want Ec > 3-10 times kT. For room temperature operation this means C ~ 1 aF.
An additional requirement to quantize the number of electrons on the island is that the electron must choose whether it is on the island or not. This requires RT > RK Where RK = h/e2 ~ 25.8 kΩ Usually 2-4 times is sufficient If the temperature is too high, the electrons can hop on and off the island with just the thermal energy. This is uncontrollable.
What is an Island? • Anywhere that an electron wants to sit can be used as an island • Metals • Semiconductors • Quantum dots • Electrostatic confinement
Assume a metallic island (ne - Q)2 E(n) = 2(Cs + Cj) Single Electron Box The energy of the configuration with n electrons on the island is : Q = Cs U
At a charge Q/e of 0.5 one more electron is abruptly added to the island. What does it mean to have a charge of 1/2 and electron?
Now the gate voltage U can be used to control the island potential. The source - drain Voltage V is small but finite. Single - Electron Transistor (SET) When U=0, no current flows. Coulomb Blockade When (CGU)/e = 0.5 current flows. Why? One more electron is allowed on the island.
These are called Coulomb blockade peaks. Is the peak the current of only one electron flowing through the island? No, but they flow through one at a time!
What about Temperature? G&D p181 As the temperature increases the peaks stay about the same, while the valleys no longer go to zero. This is the loss of Coulomb blockade. Finally the peaks smear out entirely. This shows the classical regime, such as for metal dots. In semiconductor dots resonant can cause an increase in the conductance at low temperatures (the peak values increase).
SET Stability Diagram You can also break the Coulomb blockade by applying a large drain voltage.
Ultra-sensitive electrometers Dot Signal Add an electron Lose an electron Sensitivity can be as high as 10-6 e/sqrt(Hz)
Single Electron Trap G&D p123 This non-reversible device can be used to store information.
Single Electron Turnstile G&D p124 This is an extension of the single electron trap that can move electrons one at at time
Turnstile Operation Why does it need to be non-reversible? G&D page 125 Can this be used as a current standard? Issues: Co-tunneling Missed transitions Thermally activated events
Single Electron Pump Here there are two coupled boxes, and an electron is moved from one to the other in a reversible process. G&D p128 Same Issues: Missed transitions Thermally activated events Co-tunneling
SET Vg Conductance Vg Background charge effect on single electron devices e- • Nanometer scaled movements of charge in insulators, located either near or in the device lead to these effects. • This offset charge noise (Q0) limits the sensitivity of the electrometer.
Background charge insensitive single electron memory • A bit is represented by a few electron charge on a floating gate. • SET electrometer used as a readout device. • Random background charge affects only the phase of the SET oscillations. • The FET amplifier solves the problem of the high output impedance of the SET transistor. K. K. Likharev and A. N. Korotkov, Proc. ISDRS’95
A Gas inlet To diffusion pump Plasma oxide – fabrication technique
Two step e-beam lithography on PMMA/MMA. Oxidation after first step in oxygen plasma formed by glow discharge. Oxide thickness characterized by VASE technique. Plasma oxide device Ground SET BG FG CG • 6 nm of oxide grown after 5 min oxidation in 50 mTorr oxygen plasma at 10 W.
Hysteresis Loops • SET conductance monitored on the application of a bias on the control gate. • A back gate bias cancels the direct effect of the control gate on the SET. • The change in the operating point of the SET is due to electrons charging and discharging the floating gate.
on=“1” off=“0” Telephone relay Z3 Adder Solid-state transistors Electromechanical relay Vacuum tubes CMOS IC Exponential down-scaling Zuse’s paradigm • Konrad Zuse (1938) Z3 machine • Use binary numbers to encode information • Represent binary digits as on/off state of a current switch The flow through one switch turns another on or off.
Current becomes small - resistance becomes high Hard to turn next switch Charge becomes quantized Power dissipation threatens to melt the chip. Valve shrinks also – hard to get good on/off New idea Solid-state transistors Electromechanical relay Vacuum tubes CMOS IC Quantum Dots Problems shrinking the current-switch
Charge configuration New paradigm: Quantum-dot Cellular Automata Revolutionary, not incremental, approach Beyond transistors – requires rethinking circuits and architectures Represent information with charge configuration. • Zuse’s paradigm • Binary • Current switch
Cell-cell response function A cell with 4 dots 2 extra electrons cell1 cell1 cell2 cell2 Polarization P = -1 Bit value “0” Quantum-dot Cellular Automata Represent binary information by charge configuration Tunneling between dots Polarization P = +1 Bit value “1” Bistable, nonlinear cell-cell response Restoration of signal levels Robustness against disorder Neighboring cells tend to align. Coulombic coupling
4-dot cell 2-dot cell 5-dot cell 6-dot cell Middle dot acts as variable barrier to tunneling. Indicates path for tunneling Variations of QCA cell design
energy x Clocking in QCA Keyes and Landauer, IBM Journal of Res. Dev. 14, 152, 1970 1 0 Clock 0 Clock Applied Input Removed Small Input Applied 0 but Information is preserved!
Clocking achieved by modulating barriers between dots (as in semiconductor dot case) P= +1 P= –1 Null State Clocking achieved by modulating energy of third state directly (as in metallic or molecular case) Quasi-Adiabatic Switching • Clocking Schemes for Nanoelectronics: • Keyes and Landauer, IBM Journal of Res. Dev. 14, 152, 1970 • Lent et al., Physics and Computation Conference, Nov. 1994 • Likharev and Korotkov, Science 273, 763, 1996 • Requires additional control of cells. • Introduce a “null” state with zero polarization which encodes no information, in contrast to “active” state which encodes binary 0 or 1. Clocking signal should not have to be sent to individual cells, but to sub-arrays of cells.
18KW 5KW 1.5KW 500W Power Will Be a Limiter • Microprocessor power continues to increase exponentially 100000 10000 Transition from NMOS to CMOS 1000 Power (Watts) Pentium® 100 P6 286 486 10 8086 386 8080 8008 8085 1 4004 0.1 1971 1974 1978 1985 1992 2000 2004 2008 • Power delivery and dissipation will be prohibitive ! Slide author: Mary Jane Irwin, Penn State University Source: Borkar & De, Intel
Sun’s Rocket Nozzle Surface Nuclear Reactor Hot Plate Power Density will Increase 10000 1000 Power Density (W/cm2) 100 8086 10 P6 8008 Pentium® 8085 4004 386 286 486 8080 1 1970 1980 1990 2000 2010 • Power densities too high to keep junctions at low temps Slide author: Mary Jane Irwin, Penn State University Source: Borkar & De, Intel
QCA Operation Region QCA power dissipation QCA architectures can operate at densities above 1011 devices/cm2 without melting the chip.
A M B C A 0 1 0 1 1 0 0 1 B Out C QCA devices Binary wire Majority gate Inverter Programmable 2-input AND or OR gate.
electrometers Metal tunnel junctions Al/AlO2 on SiO2 1 µm Metal-dot QCA implementation 70 mK “dot” = metal island
Thin Al/AlOx/Al tunnel junction Second aluminum deposition First aluminum deposition Tunnel junctions by shadow evaporation Oxidation of aluminum
Metal-dot QCA cells and devices Switch Point Input Double Dot • Demonstrated 4-dot cell (1,0) (0,1) Top Electrometer Bottom Electrometer • A.O. Orlov, I. Amlani, G.H. Bernstein, C.S. Lent, and G.L. Snider, Science, 277, pp. 928-930, (1997).