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Suggestion: Replacement of layer3 DSSDs to the PIXOR detectors. . Yoshiyuki Onuki , Yoshimasa Ono Tohoku University. Current layer3. From BelleII TDR. High occupancy expected at layer3 in innermost SVD layer. ⇒ Matching efficiency between PXD and SVD will be problem.
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Suggestion:Replacement of layer3 DSSDs to the PIXOR detectors. Yoshiyuki Onuki, Yoshimasa Ono Tohoku University
Current layer3 From BelleII TDR • High occupancy expected at layer3 in innermost SVD layer. • ⇒Matching efficiency between PXD and SVD will be problem. • As a consequence, it may deteriorate vertexing precision. (Caution) As the conclusion of last B2GM, each sub-detector groups are urged to study the beam BG simulation with basf2 scheme. Off course, the occupancy depends on this result. In this presentation, we adapt the occupancy in BelleII TDR.
The possible solutions • The current solutions are to adapt • Striplet DSSD • …Realistic but drastic improvement of occupancy may be difficult. • Much faster R/O chip than the APV25 • I don’t know such a chip exist or not. If exist we had adopt already? • Pixel • - Pixel can reduce the occupancy drastically. • - The detector should be monoliticin terms of material budget. • - The detector need large area to cover the acceptance in layer3 • compared with DEPFET layer1 and 2. • ⇒Even if the detector adapts binary hit data to reduce huge amount of pixel data, • there are so many pixels. This increase the cost(money, r/o speed, data bandwidth…) Monolitic can be realized by SOI and DEPFET technology. The DEPFET scheme in layer3 is too large scale.
Strip vs Pixel *Calculated by 25um×40um binary pixel in layer3 • We don’t want much R/O channels in layer3 like a pixel detector. • Occupancy should be as low as reasonably achieved. • The occupancy in pixel is quite low in layer3. • We have a room to allow the upper-limit occupancy roughly <O(~0.1%)
Neither pixel nor strip *Calculated by 25um×40um binary pixel in layer3 Such a detector, neither pixel nor strip, is suitable in layer3 Further more, resolutions in phi and z direction should be as same as the strip at least. We want the detector which have the merits of both pixel and strip.
Idea from Yoshimasa Ono PIXOR(PIXelORed) detector Superpixel consists of pixels. In the left figure, the superpixel consist of 4 times 4 pixels. We supposed superpixel consists of 16 times 16 ORed pixels and the pixel size is 25um(Z)×40um(phi). The signal in each pixel is separated to X(Z) and Y(phi). The signal is ORed and readout in each direction. ⇒# of Implemented circuits n2→2n Superpixel ⇒Relaxing limitation of pixel size →Smaller pixel, finer resolution ⇒The ghost hits are reduced compared with strip detector. PIXOR detector consists of superpixelsand chip periphery. The data of superpixels are transferred event buffer. The logic consists of serializer and
Idea from Yoshimasa Ono Readout scheme of PIXOR • Superpixel • Binary readout • Hit address readout Only hit channels are readout. Large contribution to data reduction. • Time stamp Hit time and trigger time counted in the internal counter. The hit time stamps are stored in the buffer which has enough depth of the trigger latency. The time stamps are compared with the trigger time stamps. The matched hit time stamps are readout.
Another merit of PIXOR • Material budget Sensor thickness of PIXOR to achieve comparable S/N with DSSD is ~100um because of pixel structure. c.f. Thickness of DSSD is 320um. • Small data size Only hit channels are readout. Amount of data size can be reduced ~1/10 of current DSSD scheme in layer3.
Idea from Yoshimasa Ono Block diagram of PIXOR
PIXOR Plan • The target is replacement of DSSD in layer3 with PIXOR detector. • We are discussing with SOI group in KEK Detector Technology Project. • We’ll submit first PIXOR TEG in the next OKI-SOI MPW(Oct. 2011) with the budget from SOI group. • We hope chip design completed 2014? and installed in 2015?.