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Design and Implementation of VLSI Systems (EN0160) Lecture 26: Project Overview. Prof. Sherief Reda Division of Engineering, Brown University Spring 2007. [sources: Weste/Addison Wesley – Rabaey/Pearson]. Objective: Design an 8-bit subset of a MIPS microprocessor
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Design and Implementation of VLSI Systems (EN0160) Lecture 26: Project Overview Prof. Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Weste/Addison Wesley – Rabaey/Pearson]
Objective: Design an 8-bit subset of a MIPS microprocessor 32-bit instruction encoding 8 registers $0-$7 (Register $0 is hardwired to be 0) An 8-bit counter (PC) 10 instructions Project Overview
Example program (required testbench) Translate
Controller generates multiplexer select signals and register enables to sequence the datapath Controller is a FSM that controls the CPU
Logic Design Each read/write takes four cycles to read 32 bits from the memory
Main parts 2 2 2 1 2
Controller FSM (2) ALU (2) Register file (2) ALU control (1) Integration/Memory/simulating the program (2) Main tasks
Requirements for each design you submit • Please include all the following when you submit to the integrator. • Standard cells (verified w power/area/timing numbers) (2 points) • Prototype IC layout included (6 points) • Include functional design verification (7 points) • Describe how did you optimize/constrain your design in terms of area/time/power/reliability (5 points)?