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Reconfigurable Computing: CHALLENGES. Pedro C. Diniz. João M. P. Cardoso. Portugal. The High Level Conference on Nanotechnologies, Braga, Portugal, 20 November 2007. Outline. Reconfigurable Computing Challenges Role of Reconfigurable Technologies in Future Execution Environments
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Reconfigurable Computing: CHALLENGES Pedro C. Diniz João M. P. Cardoso Portugal The High Level Conference on Nanotechnologies, Braga, Portugal, 20 November 2007
Outline • Reconfigurable Computing • Challenges • Role of Reconfigurable Technologies in Future Execution Environments • Overall Actions
Reconfigurable (Custom) Computing • Hardware resources can be “configured” to a specific architecture • Specialized Functional Elements and Processing Elements • Interconnect between “Nodes” Custom to Data flow in the application • Configurable on-chip memories (size, data-width, indexing) • Execution Models (Pipelined, Multithreading, VLIW) all possible in the same reconfigurable fabric
Customized F(a,b,c,d) Customized memories Customized interconnects Reconfigurable (customizable) Fabrics
Reconfigurable (Custom) Computing • Orders of magnitude of speed-up over traditional computing systems • When? Customization is the key: • High operation- and task-level parallelism • Increased by storage organization (data replication/distribution over multiple on-chip memories) • Non-Standard Numeric Formats (fixed-point, etc.) • Custom Routing
Are Architectures Merging?Multi-(Many)-core vs. Reconfigurable • Regularity of Reconfigurable Fabrics (e.g., FPGAs) allow them to ride Moore Law • Unbelievable large number of devices • Hard-macro cores can be plugged-in Multicore Manycore Reconfigurable Fabrics
S-RAM D-RAM S-RAM D-RAM CPU CPU S-RAM D-RAM S-RAM D-RAM CPU CPU Reconfigurable Computing: Execution Models • Data travel on paths statically or dynamically defined • Many on-chip Memories Configurable memory Configurable logic
Many on-chip Memories Each Array May be accessed in Parallel Custom Pipelining On-chip configurable memories can be adapted to communication needs Replication Increases Data Availability By writing to memories in Tandem using a customized bus S-RAM D-RAM S-RAM D-RAM CPU CPU L1 A_1 S-RAM D-RAM S-RAM D-RAM CPU CPU L2 L3 A_3 A_2 Reconfigurable Computing: Managing Data Availability
Reconfigurable (Custom) Computing • Benefits: • Reconfiguration is ideal for fast prototyping and early evaluation of realistic performance • Performance • Tolerate Defects • Costs: • Added complexity of execution models makes programming very hard (we have not yet solved the parallel programming problem yet, sort of…)
Reconfigurable Computing Many companies: Cray, SGI, SRC, ARC, PACT, PicoChip, Tilera, etc. Based on source: Bezdek, J.C, Fuzzy models - what are they, and why, IEEE Trans. on Fuzzy Systems, 1993. Reconfigurable Computing has already achieved this point!
Reconfigurable Computing • The Sony PSP Example • Reconfigurable Architecture: Virtual Mobile Engine (VME): audio • 24-bit data width • 166 MHz • Single-cycle context switch http://www.hotchips.org/archives/hc16/3_Tue/8_HC16_Sess8_Pres1_bw.pdf
Reconfigurable Computing • The Sony PSP Example • Reconfigurable Architecture: Virtual Mobile Engine (VME): audio • 24-bit data width • 166 MHz • Single-cycle context switch http://www.hotchips.org/archives/hc16/3_Tue/8_HC16_Sess8_Pres1_bw.pdf
Programming • Years of efforts on parallelizing compilers yielded meager returns on the potential for concurrent execution • Movement in industry for new concurrent programming paradigms and languages (upc, X-10, Fortress, etc.) Showstopper: Programming is excruciatingly painful… How to make devices like FPGAs easily programmable is a hard research problem, still. Application Code Reconfigurable Architectures and Execution Models Compilation, Synthesis and Optimization
Programming • Future reconfigurable architectures will exacerbate all the programming problems • Issues: • How can programming languages help the compiler? • How can architectures help the compiler and tools? Application Code Reconfigurable Architectures and Execution Models Compilation, Synthesis and Optimization
What is needed? The Looming Software Crisis due to the MULTICORE Menace Saman Amarasinghe, MIT
What is needed? Advances in Computer Architecture Success of Reconfigurable Computing Advances in Tools Advances in Programming Languages Advances in Compilers
Role of Reconfigurable Technologies in Future Execution Environments
Vacuum-tubes, relays Integrated Circuit Nanotechnology Reliable computing machines Unreliable computing machines, crummy components Unreliable computing machines John von-Neumann, Claude Shannon Redundancy to deal with failures Fault-tolerance Defect-tolerance Self-diagnosis Tolerate imperfection Deal with imperfection Assume no imperfection Based on Robinett et al., “Computing with a Trillion Crummy Components,” COMMUNICATIONS OF ACM, Sept. 2007 Technology 1950’s 2015’s? 1960’s Technology Key
1,000,000,000 Itanium 2 Itanium 100,000,000 P4 P3 10,000,000 P2 Pentium 486 1,000,000 386 286 100,000 8086 10,000 Technology • Uniprocessor Performance (SPECint) From Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, 2006 Based on a slide by Saman Amarasinghe, MIT All major manufacturers moving to multicore architectures Number of Transistors Nanotechnology may impose a step to Reconfigurable Computing! Understandable first step
Technology • Success of memories • Scalable, highly regular structures • New cells not working do not compromise chip, reduce size • Reconfigurable computing architectures • Matrix oriented • Similar scalable, regular structures • Cells not working do not compromise chip, reduces number of available resources
Nanotechnology and Reconfigurable Computing: a perfect match? • Future computer substrates of nanotechnology-based devices • likely have structure similar to current reconfigurable architectures • Implication: • Most solutions to reconfigurable computing are likely to be applicable to nanotechnology • Issues exacerbated by unreliability • Tools should reconfigure architectural layer based on defects/faults Nanoarray proposed by Andre DeHon, 2002
Future Nanofabrics: Exploiting Reconfigurability? • Changing Application Requirements • Input Application can have widely varying requirements • First handling some touch-pad interaction, next doing video processing • Real-time versus off-line needs. • Unreliable Computing substrates • Defects/Faults • Comments • No killer-app still for reconfigurability, despite 10+ years of searching • Emerging substrates might prove to be a key ground for reconfiguration as either: • Cost of detection and correction of faults is simply too high • The environment is inherently unreliable
Future Nanofabrics: Programming for Reconfigurability? • No Clear Good Approach Today • Programming Languages and Environments: Too Rigid • Change and Failures are never a first class citizen • Shall we expose some (but not all!) aspects of recovery to the programmer? • Some times failures might not be critical • Need to offer a system with graceful performance degradation
Nanotechnology and Reconfigurable Computing • We have been here before! (a déjà vu)
Overall Actions • We are at an unique opportunity in time • New comers in the game do not need to go through all the steps of the ladder • Opportunity for EU to take the leadership • Key investments (joint efforts on) • Advances in Computer Architecture • Advances in Programming Languages • Advances in Compilers • Advances in Tools
Thank You! • João M. P. Cardoso • jmpc@acm.org • http://prosys.inesc-id.pt/~jmpc