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Belle upgrade: Tracking and Vertexing

Belle upgrade: Tracking and Vertexing. T.Kawasaki(Niigata-U). Introduction. High luminosity B factory High precision measurement with high statistics to search the new physics in B decays Many modes which are sensitive to new physics need High Hermeticity

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Belle upgrade: Tracking and Vertexing

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  1. Belle upgrade:Tracking and Vertexing T.Kawasaki(Niigata-U) BNM2008 Atami, Japan

  2. Introduction • High luminosity B factory • High precision measurement with high statistics to search the new physics in B decays • Many modes which are sensitive to new physics need • High Hermeticity • Good efficiency on Low momentum & Ks daughter tracking, (tCPV) Ks vertexing (tCPV) Hermeticity BNM2008 Atami, Japan

  3. Requirements for sBelle Tracker • Robust against high beam background • We assume ×20 BG @2×1035 • Occ ~8% @the first layer of Belle SVD(r=2cm) • Fine segmentation • Fast pulse shaping & time slice information • High trigger rate • Need high speed & deadtime free readout • More tracking efficiency • Hermeticity • Shallow angle tracking. Low momentum tracking • Ks reconstruction • Better Resolution (At least competitive performance as current SVD) • Thin sensor (⇒refer the next talk for material effect) • Small BP radius Belle SVD Hit finding eff. vs. Occ. 15% Occupancy By Fujiyama(TIT) BNM2008 Atami, Japan

  4. CsI(Tl) 16X0 g pure CsI (endcap) Super Belle detector (LoI ‘04) m / KL detection 14/15 lyr. RPC+Fe g tile scintillator Tracking + dE/dx small cell + He/C2H6 • remove inner lyrs. use fast gas Si vtx. det. 4 lyr. DSSD g 2 pixel/striplet lyrs. + 4 lyr. DSSD SC solenoid 1.5T Aerogel Cherenkov counter + TOF counter g “TOP” + RICH New readout and computing systems BNM2008 Atami, Japan

  5. Super Belle Vertex Tracker(LoI ‘04) Two thin pixel layer Aim 1cm radius beam pipe (cm) r =150mm 17° 6 sensor layers to make low momentum tracking (cm) Slanted layer to keep acceptance, optimize incident angle and save detector size BNM2008 Atami, Japan

  6. Upgrade Schedule Along to the current upgrade schedule Stop Belle 2007 2008 2009 2010 2011 2012 Stop Belle on the end of 2008 (JPY) Start sBelle operation from the beginning of 2012 R&D KEKB&Belle upgrade Start sBelle Reconstruction of detector takes 3 years ⇒We have only 1 year for R&D work!! We need REALISTIC upgrade plan for T=0 operation in 2012 ( with ~1035 ) Further upgrade can be done after getting higher luminosity （1cm beampipe, Thin Monolithic Pixel sensor …… needs further R&D work） BNM2008 Atami, Japan

  7. Central Drift Chamber • Large cover area in radius • 88~863 mm　⇒ 172~1118 mm • Inner part replaced by Si Tracker • 50 ⇒ 58 layers • Small cell to reduce occupancy • ⇒ 2.5mm • 8k ⇒15k sense wires • Same gas mixture :He + C2H6 • Fast FADC readout CDC • Occupancy esitimation • Hit rate : ~100kHz  ~5kHz(current) x 20 • Maximum drift time : 80-300nsec  Shorter than the current one • Occupancy : 1-3% 100kHz X 80-300nsec = 0.01-0.03 • Momentum resolution(SVD+CDC) • sPt/Pt = (0.11~0.19)Pt  0.30/b[%] :possible thanks to large cover in radius BNM2008 Atami, Japan

  8. Silicon Vertex Tracker • Occupancy estimation • Assuming Occ ∝ Tp, channel area, 1/r2 • Current SVD VA1(Tp=800ns): ~8%@ 1st layer L =2×1035 ⇒ 8% × 20BG = 160%! • Ex)APV25 (developed for CMS Si Tracker) • Tp=50ns ⇒ Factor 16 reduction is possible • ・160 pipeline FIFO • ⇒ pulse shape scan with 40MHz Clk • Further BG reduction is possible • by Pulse shape and timing information • 32 step FIFO as event queues • Deadtime free readout@ 10kHz trigger rate Shaper 0 100 200 ns • ⇒ Standard rectangle DSSD is OK BNM2008 Atami, Japan

  9. SVT upgrade Strategy • T=0 option (2012) for L= ~1035 • Keep beampipe radius of 1.5cm same as current one • Current SVD configuration + 2 outer layers = 6layers • Improve Ks efficiency. Replace CDC inner layers • Similar design DSSD can be used • Fast Shaping(~50ns) + Timeslice on FE chip • Further upgrade for L >1035 • Smaller beampipe radius (r =1cm or less) • Innermost (thin) Pixel layers • Improve impact parameter resolution BNM2008 Atami, Japan

  10. CDC CDC SVD SVD Study on Detector configuration SVD L1-L4 @ r = 2.0, 4.35, 7.0, 8.8 cm CDC r= 8.8 ~ 86.3cm SVD Add L5&L6 @ r = (13), 14cm CDC r=16.0 ~ 112.0cm sBelle Belle Put 5&6 layer Evaluate new detector configuration with TRACKERR calculation & GEANT3 full simulation Modify the current Belle simulator Use L4 ladder structure as L5&6 layer No sensor at forward region BNM2008 Atami, Japan

  11. Impact Parameter resolution Calculated by TRACKERR r-fdirection z direction [cm] [cm] 0.02 0.03 LoI ‘04 sBelle SVD2(now) For p- 0.2GeV 0.5GeV 1.0GeV 2.0GeV 0.01 0 1.4 sinq Beampipe radius is important Competitive performance as the current SVD Occupancy effects. Degradation of intrinsic resolution is included. Efficiency loss is NOT included BNM2008 Atami, Japan

  12. Momentum resolution Calculated by TRACKERR [rad] fresolution k resolution [/MeV] 0.02 0.3 LoI ‘04 sBelle SVD2(now) For p- 0.2GeV 0.5GeV 1.0GeV 2.0GeV 0.01 0.1 0 1.4 sinq Competitive performance as the current SVD More layer doesn’t worsen momentum resolution Refer the next talk about a material effect BNM2008 Atami, Japan

  13. Ks reconstruction : 5th layer position GEANT3 Full simulation by Shinomiya (Osaka) Eff. Ks Ks Vtx resolution Require SVD hits on 2 layers Move 5th layer to outer More Ks but poor B vtx resolution =0.68 B vertex: Ks pseudo track + Beam profile Ks e- e+ Beam profile Relative luminosity to measure Acp BNM2008 Atami, Japan

  14. Requirement on S/N ratio ・Assuming signal=MIP@300mm Si ・Noise determined by Sensor Leakage current Detector Capacitance 3DSSDs are readouted via FLEX ⇒Chain readout makes large detector capacitance Noise performance depends on FE chip sBelle Belle VA1 @ Tp = 1ms enc [e-]=180+ 7.5/Cd[pF] ⇒ Leakage current dominates APV25 @ Tp = 50ns enc [e-]= 246 + 36/Cd[pF] ⇒Detector capacitance is crucial 3DSSDs:~60pF630e-　 ⇒ 2500e- (calculate Cd component only) BNM2008 Atami, Japan

  15. Effect of poor S/N ratio on the outer layers M.E. (Matching Efficiency) = Prob.(SVD hits are found on at least 2 SVD layers) GEANT3 Full sim. Increase noise CDC M.E. M.E. SVT Only 5&6 Layers All Layers Kalman filtering Extrapolate track from CDC 10 ×Typ. 10 ×Typ. Noise Noise S/N degradation on the outer layer doesn’t affect to M.E. so much But, In case of Ks daughter track… BNM2008 Atami, Japan

  16. Matching efficiency for Ks 1.0 normal Matching efficiency Noise x 2 Noise x 4 0 0 10 20 [cm] Increase Noise on L5&L6 only GEANT3 Full sim By Nakagawa (Niigata) SVD Matched track L3 L4 L5 L3 L4 L5 normal Noise x 4 0 10 20 [cm] r of Ks decay vertex r of Ks decay vertex M.E. for Ks daughters are affected by S/N degradation Lose 20% (SVT) events with 4 times worse S/N BNM2008 Atami, Japan

  17. BG effect on physics analysis Total performance of CDC + SVD • Major loss comes from low tracking efficiency for slow particles • Efficiency loss on high multiplicity event is serious • Moreover a pulse shape information CDC by FADC readout can save efficiency • Gain by SVD standalone tracker is not included Preliminary By Ozaki BNM2008 Atami, Japan

  18. Key technology for upgrade • Timeslice Information/Full Pipeline readout • Pipeline in FE chip(APV25, VA-modified, own ASIC) • Practical implementation scheme in a limited space • Ladder assembling. Mechanical Support structure • Cooling/Cabling scheme • Save S/N for outer layer. • FLEX readout. Chip on sensor • Sensor development • Low noise & Large area sensor is desirable • Thin (less material)  Thick (more signal) • Pixel sensor (Option for future upgrade) • Thin & Fast readout. Monolithic device? • No more HPK DSSD. • Micron? SINTEF? • New activities in India, Korea BNM2008 Atami, Japan

  19. Status of R&D Activity Hybrid card with 4 APV25 chips Operated with 40MHz clock (Princeton) FADC: 40MHz digitization Online sparsification with FPGA • We have been working to prepare Pipeline readout sensor module (Vienna) Beamtest done in KEK in Nov 2007 in KEK Fuji testbeam line 3GeV electron Confirm the capability of online sparsification algorithm The result will come soon BNM2008 Atami, Japan

  20. Chip on sensor with FLEX hybrid Proposal by Vienna group Readout each DSSD by putting thinned FE chip on sensor Cooling with water through carbon fiber tube (low material and good thermal conduction) No Cooling Cooling with 13℃ water BNM2008 Atami, Japan

  21. Schedule for CDC/SVT upgrade Start sBelle Stop Belle 2007 2008 2009 2010 2011 2012 Test Design CDC End Plate Machining R&D Wire stringing Cabling/Tubing Installation &Final Test Cosmic Test Sensor Production Test SVT Design R&D Endring &Beampipe Assembling Installation Final Test NOT official one BNM2008 Atami, Japan

  22. Summary • We have started activity for the practical detector design for Belle upgrade • CDC • Same gas mixture as Belle • Better resolution with larger coverage in radius • Reduce BG Occ. with small cell and time digitization • SVT • R=1.5cm Beampipe + 6 DSSD layers • Employ Standard DSSD with short shaping (=50ns) for T=0 • Competitive resolution as the current SVD • R&D of Pixel sensor should continue for the further upgrade • Please join!! Any contributions are welcome! BNM2008 Atami, Japan

  23. Pixel sensor R&D SOIPIX KEK-OKI Items to be achieved for High luminosity B factory • Readout Speed • Radiation Hardness • Thin Detector • Full-sized detector 2005 2.5mmx2.5mm 32x32 cells chip ・MAPS is the unique solution. ・Development of MAPS (Monolithic Active Pixel sensor) is in world wide competition (ex:CAPS(Hawaii), SOIPIX (KEK)) ・It looks promising but needs more R&D for a few years Progresses in the coming a few years are very important. 2006 5mmx5mm 128x128 cells chip BNM2008 Atami, Japan

  24. Backups BNM2008 Atami, Japan

  25. Bkg & TRG rate in future x20 Bkg x10 Bkg KEKB Bkg SVD CDC PID / ECL KLM Synchrotron radiation Beam-gas scattering (inc. intra-beam scattering) Radiative Bhabha BNM2008 Atami, Japan

  26. BNM2008 Atami, Japan

  27. Hit rate Apr.-5th ,2005 IHER = 1.24A ILER = 1.7A Lpeak = 1.5x1034cm-2sec-1 ICDC = 1mA Small cell Inner Main 10KHz BNM2008 Atami, Japan

  28. Simulation Study for Higher Beam Background by K.Senyo. MC +BGx1 MC+BGx20 BNM2008 Atami, Japan

  29. Hit rate at layer 35 Dec.,2003 LER HER IHER = 4.1A Hit rate = 13kHz ILER = 9.4A Hit rate = 70kHz Dec., 2003 : ~5kHz Now : ~4kHz In total 83kHz BNM2008 Atami, Japan

  30. CDC : Main parameters BNM2008 Atami, Japan

  31. Intrinsic Resolution vs. Occupancy Intrinsic Resolution occupancy < 0.04 occupancy  0.3 residual residual At high occupancy, g cluster shape is 'distorted' g reconstructed cluster energy to be off g the residual distribution to be widened S.Fratina g Occupancy BNM2008 Atami, Japan

  32. Hit Efficiency vs. Occupancy Efficiency Layer No. hit or not? 1 2 Layer2 Layer1 • Higher Occupancy • ~ Lower Hit Efficiency • Signal + background hits • g wider 'distorted' cluster • Wrongly associated background cluster 1.0 h 0.6 Layer4 Layer3 3 4 0% g 30% Occupancy BNM2008 Atami, Japan Y.Fujiyama

  33. Occupancy problem at innermost layer L=1035/cm2/s SVD2(800nsec) • Estimate occupancy at Super B • Occupancy at SVD2 • At most, 10% in r =20mm for 1034/cm2/s • AssumingOcc. = luminosity/r2 • r =15mm for 1035/cm2/s a occupancy = 200% Factor 40 of reduction is needed!! • How can we reduce Occ.? • Assuming Occ. = sensitive area* shaping time • Short shaping time • Tp=100ns is possible (Factor 8) (SVD2:VA1TA, Tp=800ns) • Strip area should be small. • Area=pitch*length a short strip • How to shorten a strip length by 1/5? 5% BNM2008 Atami, Japan

  34. Striplet design SVD2(800nsec) S-VTX(100nsec) • To shorten strip length, we propose new type of DSSD • Arrange strips in 45 degrees. Strip length is shortened • Small triangle dead region exists. • About 7 % in Layer1 • Striplet can survive up to 2×1035/cm2/s (1036 needs pixel type sensor!) Tp=50ns 5% Striplet Z Dead region U 10mm rφ 14mm V 70mm BNM2008 Atami, Japan

  35. Prototype Striplet Sensor (HPK) 74.1mm • Thickness:300mm • Double sided • P and N strips on N-bulk • Incline strip by 45 degree. • 1024 strips on each side • Strip pitch = 51mm in U-V direction. (Pad spacing is 72mm along sensor edge) • Since sensor size is small, inactive region can’t be ignored • How to reduce dead region • Check behavior near inactive region carefully. 71.0 mm 2.75mm 8.5mm 10.5mm BNM2008 Atami, Japan

  36. Scan strips with IR laser scan • Results • Striplet detector is functional. • No signal on the triangle part • The edge of active region is so sharp. End of active region N-side P-side sum Signal (normalized) Signal (normalized) sum Laser position[mm] Laser position[mm] BNM2008 Atami, Japan

  37. 全層のS/Nを悪くしたとき Matching efficiency Normal S/N Noise x 4 Noise x 5 BNM2008 Atami, Japan

  38. Ks vertexの分布 BNM2008 Atami, Japan

  39. KsイベントでのMatching efficiency の変化 normal Noise x 2 Noise x 4 r of Ks vertex BNM2008 Atami, Japan

  40. normal Noise x 2 Noise x 4 Noise x 10 BNM2008 Atami, Japan

  41. Mis-alignment effect Red: Perfectly aligned Blue: 10um, 0.1mrad Green: 20um, 0.2mrad Pink: 30um, 0.3mrad • Large VTX tracker makes difficulty on alignment. Ks VTX Resolution Ks eff. Mis-alignment doesn’t affect to efficiency BNM2008 Atami, Japan

  42. FLEX hybrid/Chip on sensor Flex Hybrid Connector APV25 M.Pernicka, M.Friedl, C.Irmler (HEPHY Vienna) BNM2008 Atami, Japan

  43. Sensor Configuration (SVD1→SVD2) 45cm 22cm 46cm Z view BNM2008 Atami, Japan

  44. Rib Bridge Hybrid DSSD FLEX SVD2: Ladder Structure • VA1TA chip • 4 VA1TAs on a hybrid • 4analog signals read out in parallel • 128 channels/chip • 4 mW/channel Number of channel: 128ch × 4 chips ×2 hybrid(f/z)×2 hybrids(F/B) ×(6+12+18+18) Ladders = 110,592Analog signals BNM2008 Atami, Japan

  45. Readout with APV25 ASIC Trigger • Noise= (246 + 36/pF) @50nsec Analog output 192 stageAnalog Pipeline (4 µsec) 128 channel Multiplexer (3 µsec) Shaper preamp Inverter • APV25 is chosen • Originally developed for CMS Silicon tracker • Operated with 40MHz clock • 192 stage pipeline (~4 µsec trigger latency) • Up to 32 readout queues • 128 ch analog multiplexing (3 µsec@40 MHz) • Dead time: negligible at expected trigger rate of 10 kHz BNM2008 Atami, Japan 45 The silicon tracker development at KEK, Toru TSuboyama (KEK), 19 Dec. 2007 SILC meeting at Torino, Italy

  46. Hit timing reconstruction Trigger Shaper (HEPHY Vienna) • B-Factory --> 2 nsec bunch crossing • APV25 deconvolution filter can not be used. • Hit time reconstruction • Proposed by Vienna group • Read out 3, 6 … slices in the pipeline for one trigger. • Extract the hit timing information from wave form. • Proven in beam tests: Resolution ~ 2 nsec. • Reconstruction done in the FPGA chips in FADC board. BNM2008 Atami, Japan 46 The silicon tracker development at KEK, Toru TSuboyama (KEK), 19 Dec. 2007 SILC meeting at Torino, Italy

  47. Occupancy estimation Assuming x15BG@2x10^35 , x30BG@10^36 • Int res= x1.5(1.2) for 30%(10%) occupancy • Occupancy　∝ 1/r2 × sensor aread • Hit efficiency loss is not considered. (-10% for 30% Occ) Assuming factor 3 for safety margin, in order to calculate helix resolution. BNM2008 Atami, Japan

  48. dr resolution dr resolutoin SuperB SVD3mod SVD3 For p 0.2GeV 0.5GeV 1.0GeV 2.0GeV dr New CDC conf. TRACKERR V2.18 BNM2008 Atami, Japan

  49. dz resolution dz resolutoin SuperB SVD3mod SVD3 For p 0.2GeV 0.5GeV 1.0GeV 2.0GeV dz BNM2008 Atami, Japan

  50. f resolution phi resolutoin SuperB SVD3mod SVD3 For p 0.2GeV 0.5GeV 1.0GeV 2.0GeV f BNM2008 Atami, Japan

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