SuperCISC Compiler C to VHDL compiler Processor actors are bottleneck Hardware acceleration

1. Rapid Prototyping and Emulation of Many-Core Chip Multiprocessors with Integrated Hardware Accelerators Colin J. Ihrig University of Pittsburgh Email: cji3@pitt.edu ACME Actor Generator ACME Actor Generator SuperCISC Compiler • Problem • Need to study new architectures • System design is time consuming • Software simulators do not scale well • Orders of magnitude slowdown #pragma HWstart z = x + y; m = y << 3; n = m – y; if ( n < 0 ) n = 0; if ( q == 3 ) i = z + 5; else i = z – 2; j = n * i; #pragma HWend • C to VHDL automation flow • Annotate C code with pragmas • Construct Super Dataflow Graph • Custom coprocessors in ACME • ACME • Graphical design entry • Uses Ptolemy II environment from UC Berkeley • Components called ‘actors’ • Generate systems targeting FPGAs • System emulation • Rapid MPSoC prototyping • Processor and logic design • Skeleton code generated for: • Ptolemy Java Actor • Java Native Interface C and Header files • ACME VHDL Actor • Actors automatically incorporated into ACME and Ptolemy II • Processor Based Actors • Design complex components • Example: Switch arbiters • Describe functionality in C • Use Java Native Interface within Ptolemy II • Soft core processors run code on FPGA Actor Generator GUI ACME actor library mirrors Ptolemy’s Java library Xilinx library contains IP blocks and board descriptions Generated skeleton code for actor Extend Ptolemy II GUI for graphical actor creation • SuperCISC Compiler • C to VHDL compiler • Processor actors are bottleneck • Hardware acceleration SoC Generation Tool Flow Ptolemy II Graphical Model Creation Xilinx Platform Studio System Emulation Augmentation User specified latency and throughput circuit 2x2 Mesh Interconnect Network 2x2 Mesh Interconnect Network Three cycle throughput Network Switch Logic Containing VHDL Actors • Emulation clock • Target vs. Host FPGA cycles • Decouples emulated system from FPGA • Tracked via hardware counters One additional latency cycle Processors set / reset barrier Microblaze Processor Systems Fast Simplex Link Bus Connections Processor / hardware synchronization via a hardware barrier circuit Serial Port for PC Communication Barrier clocks custom logic Processing Node