IKI20210 Pengantar Organisasi Komputer Kuliah Minggu ke-5c: Prosesor

1. IKI20210Pengantar Organisasi KomputerKuliah Minggu ke-5c: Prosesor Sumber:1. Hamacher. Computer Organization, ed-4.2. Materi kuliah CS152, th. 1997, UCB. 11 Oktober 2002 Bobby Nazief (nazief@cs.ui.ac.id)Johny Moningka (moningka@cs.ui.ac.id) bahan kuliah: http://www.cs.ui.ac.id/~iki20210/

2. Pengendalian Eksekusi Instruksi: Microprogrammed Control

3. Microprogramming • Control is the hard part of processor design ° Datapath is fairly regular and well-organized ° Memory is highly regular ° Control is irregular and global Microprogramming: -- A Particular Strategy for Implementing the Control Unit of a processor by "programming" at the level of register transfer operations Microarchitecture: -- Logical structure and functional capabilities of the hardware as seen by the microprogrammer Historical Note: IBM 360 Series first to distinguish between architecture & organization Same instruction set across wide range of implementations, each with different cost/performance

4. Microinstructions IRin PCin PCout MARin MDRout Yin R1in R1out R3out Zin Zout Clear Y Carry-in Add Read WMFC End STEPCONTROL SIGNALS 1. PCout, MARin, Read, Clear Y, Carry-in to ALU, Add, Zin 2. Zout, PCin, WMFC 3. MDRout, IRin 4. R3out, MARin, Read 5. R1out, Yin, WMFC 6. MDRout, Add, Zin 7. Zout, R1in, End 1 2 3 4 5 6 7

5. IR Starting Address Generator Clock μPC Control Store ControlWord Organisasi Microprogrammed Control Unit

6. IR Starting Address Generator Status Flags Condition Codes Clock μPC Control Store ControlWord Organisasi μProgrammed Control Unit: Branching

7. Format Microinstruction • Figure 3.19

8. Microprogram Sequencing • Figure 3.22

9. “Macroinstruction” Interpretation User program plus Data this can change! Main Memory ADD SUB AND . . . one of these is mapped into one of these DATA execution unit AND microsequence e.g., Fetch Calc Operand Addr Fetch Operand(s) Calculate Save Answer(s) CPU control memory

10. Control: Hardware vs. Microprogrammed • Control may be designed using one of several initial representations. The choice of sequence control, and how logic is represented, can then be determined independently; the control can then be implemented with one of several methods using a structured logic technique. Initial Representation Finite State Diagram Microprogram Sequencing Control Explicit Next State Microprogram counter Function + Dispatch ROMs Logic Representation Logic Equations Truth Tables Implementation Technique PLA ROM “hardwired control” “microprogrammed control”

11. Peningkatan Kinerja Prosesor

12. A C B Instruction Decoder IR PC Register File TEMP ALU MDR MAR Addresslines Datalines Memory Bus Organisasi Prosesor (Multiple-bus) Add R1,R2,R3 ;R1R2+R3

13. Instruction Decoder PC MAR IR MDR R1 R2 Y R3 ALU TEMP Z Bandingkan dengan Organisasi Single-bus Add R1,R2,R3 ;R1R2+R3

14. Beberapa Teknik Peningkatan Kinerja Prosesor • Pre-fetching:instruksi berikutnya (i+1) di-fetch pada waktu pengeksekusian instruksi (i) • Perlu teknik “Branch Prediction” • Pipelining:eksekusi instruksi dipecah kedalam tahap-tahap yang dapat dilakukan secara “overlap” • Fetch Instruksi • Decode Instruksi • Baca Operand (dari register asal) • Lakukan Operasi • Tulis Hasil (ke register tujuan) • On-chip Cache:mempercepat akses data dari/ke memori

15. Arsitektur Intel P6 (Pentium Pro)

16. Contoh: Komputer Berbasis SPARCstation20 • TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20 MBus Module SuperSPARC Floating-point Unit L2 $ CC DRAM Controller Integer Unit MBus MBus control M-S Adapter L64852 Inst Cache Ref MMU Data Cache STDIO SBus serial kbd SCSI Store Buffer SBus DMA mouse Ethernet audio RTC Bus Interface SBus Cards Boot PROM Floppy