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Logic Modules. Introduction. Historical Perspective Actel (Act 1,2,3, SX) Basics Flip-flop Construction Chip Express Atmel - AT6010 Xilinx (i.e., CQR40xxXL, Virtex) LUTs/RAM Carry Logic/Chain UTMC/Quicklogic (i.e., UT4090) RAM blocks Mission Research Corp. (MRC) - Orion.
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Introduction • Historical Perspective • Actel (Act 1,2,3, SX) • Basics • Flip-flop Construction • Chip Express • Atmel - AT6010 • Xilinx (i.e., CQR40xxXL, Virtex) • LUTs/RAM • Carry Logic/Chain • UTMC/Quicklogic (i.e., UT4090) • RAM blocks • Mission Research Corp. (MRC) - Orion
Act 1 Logic Module 8 Input Combinational function 702 possible combinational macros1 1”Antifuse Field Programmable Gate Arrays,” J. Greene, E. Hamdy, and S. Beal, Proceedings of the IEEE, Vol. 91, No. 7, July 1993, pp. 1042-1056
Act 2 Logic Module: C-Mod 8-Input Combinational function 766 possible combinational macros1 1”Antifuse Field Programmable Gate Arrays,” J. Greene, E. Hamdy, and S. Beal, Proceedings of the IEEE, Vol. 91, No. 7, July 1993, pp. 1042-1056
Act 2 Flip-flop Implementation Feedback goes through antifuses (R) and routing segments (C) Hard-wired Flip-flop Routed or “C-C Flip-flop”
Act 3 Logic Module: C-Mod 8 Input Combinational function
Act 3 Logic Module: S-Mod Flip-flop with clear 8 Input Combinational function
SX, SX-S Logic Module: C-Cell 9-Input Combinational function > 4000 functions
SX, SX-S Logic Module:Hierarchy • Horizontal banks of C-cell and R-cell logic modules form Clusters. • Type 1 contains two C-cells and one R-cell. • Type 2 contains one C-cell and two R-cells. • Groups of clusters form SuperClusters • SuperCluster 1 is a two-wide grouping of Type 1 clusters. • SuperCluster 2 is a two-wide group of one Type 1 and one Type 2 cluster. • There are more SuperCluster 1 modules than SuperCluster 2 modules.
SX, SX-S Logic Module:Routing Types • Direct Connect • No antifuses • Fast Connect • One antifuse • Regular routing • Two or more antifuses
Chip Express Family Comparison • QYH500 • Gate-Based • 0.8 m Bulk • DPLL • CX2001 • Module-Based • 0.6 m EPI • Embedded SRAM • APLL
Chip Express SEU ComparisonQYH530 (0.8 um) vs. CX2041 (0.6 um)
Early FPGA vs. New Quick-Turn ASIC Family Comparison • 1020 Series • Module Based • 2.0 m 0.9 m • CX2001 • Module-Based • 0.6 m EPI • Embedded SRAM and APLL
AT60xx Logic Module 28 unique functions
XC4000 Series CLBSimplified CLB - Carry Logic Not Shown RAM LUTs for Logic or small SRAM Two Flip-flops
XQR4000XL Carry Path Placement is important for performance. General interconnect
Carry Logic Operation Effective Carry Logic for a Typical Addition - XQR4000XL
UT4090 Logic Module • Antifuse Configuration Memory • Mux-based • Multiple Outputs • Wide logic functions
UT4090 RAM Module • Dual-port • 1152 bits per cell • Four configurations • 64 X 18 • 128 X 9 • 256 X 4 • 512 X 2