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AVR CPU Core & 8 bit AVR Instruction Set

AVR CPU Core & 8 bit AVR Instruction Set. 안철수 KAIST 석좌교수 " 개발자가 성공하는 길 ". 개발자가 성공하는 길 http://www.devmento.co.kr/devmain/ucc/ucc/ucc_detail.jsp?cate_code=ADAFAA&dataSeq=76&main_id=SUCC1W001. Block Diagram of the AVR Architecture. AVR Architecture. Flash program memory (16bit)

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AVR CPU Core & 8 bit AVR Instruction Set

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  1. AVR CPU Core & 8 bit AVR Instruction Set

  2. 안철수 KAIST 석좌교수 "개발자가 성공하는 길" • 개발자가 성공하는 길 • http://www.devmento.co.kr/devmain/ucc/ucc/ucc_detail.jsp?cate_code=ADAFAA&dataSeq=76&main_id=SUCC1W001

  3. Block Diagram of the AVR Architecture

  4. AVR Architecture • Flash program memory (16bit) • 16 bit x 216 = 2 byte x 64 k = 128 kbyte • Program code가 저장되는 곳 • DataMemory (8 bit) • 범용 register: 32 byte • I/O register : 64 byte • Ext I/O register : 160 byte • SRAM : 4096byte • 변수가 저장되는 곳 • PC : Program Counter • address of the instruction being executed

  5. Program / Compile / Execution • Program 작성 -> C code 생성 • Compile -> hex code 생성 • hex code : download 가 가능한 code • machine code (opcode) : 실행가능한 code • assembly code : machine code의 의미 • Execution • start address of program code => PC • Fetch : PC -> flash program memory => machine code -> IR PC = PC+1 (또는 PC+2) (IR : instruction register) • Decode : instruction decode • Register Operand Fetch • ALU Operation Execute • Result Write Back • goto Fetch

  6. Instruction Execution • Instruction • an element of an executable program • a single operation of a processor • Parallel Instruction Fetches and Instruction Executions • Single Clock Cycle Execution : Harvard architecture • clkCPU : system clock • Atmega 128 : 16MHz 가능, XTAL1 pin으로 공급 • 실습 kit : 7.3728 MHz (확인요)

  7. Single Cycle ALU Operation (inAVR) • Execution Cycle • Execution Time • 1/clkCPU • clkCPU = 16 MHz ? • clkCPU = 7.3728 MHz ?

  8. 8 bit AVR Instruction Set • AVR Instruction Set : http://www.atmel.com • 133 Instructions • Instruction • Operation Code + Operand • Operation Code : ALU가 실행할 내용 • Operand : ALU가 실행할 대상 • Ex) ADC : Add with Carry • ‘ADC R1, R2’ 의 opcode 는 ?

  9. Operation Code의 유형 • Arithmetic and Logic • 범용레지스터간의 사칙연산과 로직 연산 • ADC, AND, SUB, AND, OR, … • Branch • Change program counter : 다른 opcode위치로 이동 • JMP, BRBC, … • Data Transfer • Load : SRAM등의 Data를범용 Register로 이동 (LD, LDI, …) • Store : 범용 Register의값을 SRAM 등으로 이동 (ST, STD, …) • Bit and Bit-Test • Register의특정 bit을 set(=‘1’)하거나 clear(=‘0’)으로 변경 • SBI, CLI, …. • MCU Control

  10. Data Addressing Mode : Operand의 유형 • Immediate • actual operand • Direct (absolute) • address of operand • Register Direct, I/O Direct, Data Direct • Indirect • Address that specifies (or points to ) operand • Data Indirect, Data Indirect with Displacement, Data Indirect with Pre-Decrement, Data Indirect with Post-Increment

  11. Example) Immediate Addressing • ANDI – Logical AND with Immediate • ANDI r17, $0F

  12. Example) Register Direct Addressing

  13. Example) Register Direct Addressing • ADD – Add without Carry • ADD r1, r2 • ADD r28, r28

  14. Example) I/O Direct Addressing • IN - Load an I/O Location to Register • IN r25, $16

  15. Example) Data Direct Addressing • LDS – Load Direct from Data Space • LDS R25, $0100 • 2 word/2 cycle

  16. Data Indirect • X,Y,Z register 사용

  17. Example) Data Indirect • LD

  18. Example) Data Indirect • CLR R27 • LDI R26,$60 • LD R0,X+ • LD R1,X • LDI R26,$63 • LD R2,X • LD R3,–X

  19. Status Register • The Status Register contains information about the result of the most recently executed • SREG

  20. Status Register • 비트 7(I : Global Interrupt Enable) : • 전체 인터럽트를 허용하도록 설정하는 비트로 SEI 및 CLI 명령으로 이 비트를 제어할 수 있다. • 비트 6(T : Bit Copy Storage) : • BLD, BST 명령을 사용하여 어느 레지스터의 한 비트 값의 복사 가능. • 비트 5(H : Half Carry Flag) : • 산술연산의 가감산에서 비트3에서 올림수가 발생하면 1로 세트 BCD 연산에 사용 • 비트 4(S : Sign Bit) : • 플랙 N과 V의 XOR(eXclusive OR)값으로 정수들의 크기를 판단에 사용.

  21. Status Register • 비트 3(V : 2's Complement Overflow Flag) : • 2의 보수 연산에서 오버플로우를 표시한다. • 비트 2(N : Negative Flag) : • 연산 결과값의 최상위 비트가 1로 되어 2의 수 표현을 사용하는 경우 연산 결과가 음수임을 표시. • 비트 1(Z : Zero Flag) : • 연산 결과값이 0이 되었음을 표시. • 비트 0(C : Carry Flag) : • 연산으로 자리올림이나 자리내림이 발생하면 1로 세트 된다.

  22. Status Register • 모든연산이 실행된 후에 SREG이 변경됨 • 예) ADD

  23. ★ JTAG Emulator • JTAG (Joint Test Action Group) • Testing PCBs by using the JTAG Boundary-scan capability • Programming the non-volatile memories, Fuses and Lock bits • On-chip debugging • program download : JTAG emulator • UART 통신 : ISP programmer

  24. Instruction Example : int main(){ unsigned char *a,*b,*c; a = (unsigned char *)0x100; b = (unsigned char *)0x101; c = (unsigned char *)0x102; *c = *a + *b; return 0; }

  25. Machine Code(Opcode) / Assembly Code • Compile/Download 후 Debug메뉴의 ‘Start Debugging’ • View 메뉴의 ‘Disassembler’ • +0000005F: 91900100 LDS R25,0x0100 • Load direct from data space • +00000061: 91800101 LDS R24,0x0101 • Load direct from data space • +00000063: 0F89 ADD R24,R25 • Add without carry • +00000064: 93800102 STS 0x0102,R24 • Store direct to data space

  26. Instruction Example : int main(){ unsigned int *a,*b,*c; a = (unsigned int *)0x100; b = (unsigned int *)0x101; c = (unsigned int *)0x102; *c = *a + *b; return 0; }

  27. Machine Code(Opcode) / Assembly Code

  28. Instruction Example : int main(){ unsigned int *a,*b,*c; a = (unsigned int *)0x100; b = (unsigned int *)0x102; c = (unsigned int *)0x104; return 0; }

  29. Machine Code(Opcode) / Assembly Code

  30. HEX File • Compile 결과물의 하나 • Project directory 아래 “default” 폴더 • Intel Hex Format :100000000C9446000C945D000C945D000C945D0013 :100010000C945D000C945D000C945D000C945D00EC :100020000C945D000C945D000C945D000C945D00DC :100030000C945D000C945D000C945D000C945D00CC :100040000C945D000C945D000C945D000C945D00BC :100050000C945D000C945D000C945D000C945D00AC :100060000C945D000C945D000C945D000C945D009C :100070000C945D000C945D000C945D000C945D008C :100080000C945D000C945D000C945D0011241FBE67 …

  31. Intel Hex Format :100000000C9446000C945D000C945D000C945D0013 : 10 0000 00 0C 94 46 00 0C 94 5D 00 0C 94 5D 00 0C 94 5D 00 13

  32. Intel Hex Format 8-bit 16-bit

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