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How to Implement the WaveVideo Plugin in an MSR Router. WaveVideo. Example of application specific congestion control Implemented as: Video Encoder Router Plugin Video Decoder Current implementation is in the Crossbow framework Uses about 3 Mb/s for video
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WaveVideo • Example of application specific congestion control • Implemented as: • Video Encoder • Router Plugin • Video Decoder • Current implementation is in the Crossbow framework • Uses about 3 Mb/s for video • Requires congestion to demonstrate its usefulness
Current WV Assumptions • It will be given some indication of: • Its target rate in bits/second • Does not actually use any indication of congestion being present • Currently works with DRR • Sends a PCU message to the crossbow packet scheduler for interface to get its target rate. • If WV behaves, no one else will drop its packets. • WV plugin needs to be the only place where WV packets get dropped • Relies on DRR dropping packets from the longest queue • Each flow corresponds to a queue • All flows share equally • Therefore if WV stays under its share and there is congestion it will be because there is another longer queue
X.1 Z.1 IP Options SP1 SP2 ... Out PN 0 SPN Out PN 1 ... Out PN M Ingress SPC, No FPX SW Interrupt Priority Y.1 Do we have any Packet Scheduling on Ingress Side? Will WV packets be dropped if there is congestion? W.1 X.2 Y.1 Local Resource Manager (swint) Z.2 PCU Framework HW Interrupt interrupt APIC Exact Match (add SID) Route Lookup (Add Output VIN) Replace IntraShim with IntgerShim APIC IP opt? SID? APIC Buffer Management Insert IntraPort Shim (Add Input VIN) DQ hi frequency interrupt (100us) CP command processor Command (AAL0) reply to CP CP commands In/Out (AAL0) DQ Broadcast Cells
X.1 Z.1 Manage In P1 In P2 ... Out NH 0 In PM Out NH 1 ... Out NH N Egress SPC, No FPX SW Interrupt Priority Y.1 W.1 X.2 Y.1 Is this Packet Scheduling on Egress Side per flow? If not, how can WV know that it behaving will make a difference? Local Resource Manager (swint) Z.2 PCU Framework HW Interrupt interrupt Exact Match (add SID) Determine Out VC Remove Shim DRR Service APIC APIC SID? APIC Buffer Management Insert IntraPort Shim (Add Input VIN) DQ drr thread CP command processor Command (AAL0) reply to CP CP commands DQ Broadcast Cells hi frequency interrupt (100us)