Context-Flow SOC Design Environment

1. Context-Flow SOC Design Environment Rami Beidas Department of Electrical and Computer Engineering University of Toronto rbeidas@eecg.toronto.edu

2. Motivation • Functional complexities and computational requirements in projected SOCs • The use of heterogeneous multiprocessor architecture with on-chip interconnection network • Problems: • Lack of programming model • Well-defined design flow

3. Context-Flow Programming Model • Motivated by coarse-grained parallelism abundant in multimedia and networking applications • based on the concept of context • Can be realized simply by two C library functions – cfNewContext, cfMalloc • Directly supported by on-chip logics overlaid on top of the commercial on-chip fabrics (e.g.AMBA)

4. Towards Scalable Architecture • Performance gain demonstrated on a number of real-life applications • For larger systems, a two-layer approach is used • Traffic-dependent upper layer communication architecture

5. Towards Scalable Synthesis • Traditional HLS algorithms vs. complexity of target applications • Scalability of synthesis algorithms at various HLS stages • e.g. interprocedural register allocation

6. Appl in HLPL (C) C to CF-C CF-C Scalable HLS RTL Predefined Components Integration Traditional RTL Flow Arch Specs Context-Flow SOC Design Environment