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ECE223

ECE223. Reouven Elbaz – February 10 th , 2009 reouven@uwaterloo.ca Office room: DC3576. Outline. Multiplexers Decoders 3-state Gates Read Only Memories (ROM). Multiplexers. A 2 n -to-1 multiplexer selects one of its 2 n input values and outputs it – data selector . How?

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ECE223

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  1. ECE223 Reouven Elbaz – February 10th, 2009 reouven@uwaterloo.ca Office room: DC3576

  2. Outline Multiplexers Decoders 3-state Gates Read Only Memories (ROM)

  3. Multiplexers A 2n-to-1 multiplexer selects one of its 2n input values and outputs it – data selector. How? Using control signals that encode the position of the targeted input… How many control signals?  For 2ninputs, n control signals I0 I1 I2 MUX I3 Output I6 I7 I3 I4 8-to-1 I5 I6 I7 c a b

  4. 2-to-1 Multiplexer Output = aI0 + a’I1 I0 MUX Output 2-to-1 I1 a I1 I0

  5. 4-to-1 Multiplexer Output = a’b’I0 + a’bI1 + ab’I2 + abI3 a’b’I0 I0 a’bI1 I1 MUX Output 4-to-1 a b I2 ab’I2 I3 abI3 a' b'

  6. General Case: 2n-to-1 multiplexer I0 I1 I2 MUX Output 2n-to-1 I 2n S0 S1 Sn Mintermk of the n control signals Input designated by the mintermk

  7. 4-to-1 Multiplexer with Enable I0 I1 MUX e Output 4-to-1 a b I2 I3 0 X X 0

  8. How to construct a 8-to-1 Muxfrom 4-to-1 Muxes ? What we want Done! What we have I0 I4 I5 I1 O1 MUX MUX a a b Or Y b 4-to-1 4-to-1 O2 I2 I6 e I3 I7 a b

  9. VHDL Example • entity Mux4-to-1 is • port( I0, I1, I2, I3: in std_logic; CTRL: in std_logic_vector(1 downto 0); Output: out std_logic ); • end Mux4-to-1; • architecture behav of Mux4-to-1 is • begin • case CTRL is • when "00" => Output <= I0; • when "01" => Output <= I1; • when "10" => Output <= I2; • when "11" => Output <= I3; • when others => Output <= I1; • end case; • end; I0 I1 MUX Output 4-to-1 I2 I3 2 CTRL

  10. Decoders • An n-to-m (m ≤2n) decoder converts binary information from n input lines (n-bit coded information) to a maximum of 2n unique output lines. • How? • It generates all the minterms of the n input variables (to have exactly one of the outputs at 1 for each combination of inputs) • Example: n=3 and m=8 3-to-8 Decoder O0 O1 I0 O2 O3 I1 O4 I2 O5 O6 O7

  11. Example: 3-to-8 Decoder 3-to-8 Decoder O0 O1 a O2 O3 b O4 c O5 O6 O7 O0= a’b’c’ c’ O1= a’b’c c O2= a’bc’ b’ O3= a’bc b a’ O4= ab’c’ a O5= ab’c O6= abc’ O7= abc

  12. From Decoder to Multiplexer I0 O0 I1 2-to-4 Decoder MUX a O1 Output b 4-to-1 O2 a b I2 O3 I3 Output = a’b’I0 + a’bI1 + ab’I2 + abI3 O0= a’b’ O1= a’b I0 b’ b’ Output I1 Or O2= ab’ b b a’ a’ I2 O3= ab a a I3

  13. Decoder with Enable Input 2-to-4 Decoder O0 a O1 b O2 O3 e O0= a’b’e’ b’ O1= a’be’ b O2= ab’e’ a’ O3= abe’ a e

  14. How to construct a 3-to-8 Decoder from 2-to-4 Decoders ? 2-to-4 Decoder O0 a O1 b O2 O3 e 2-to-4 Decoder O4 O5 O6 O7

  15. VHDL Example • entity DECODER2-to-4 is • port( I: in std_logic_vector(1 downto 0); O: out std_logic_vector(3 downto 0)); • end DECODER2-to-4; • architecture behav of DECODER2-to-4 is • begin • case I is • when "00" => O <= "0001"; • when "01" => O <= "0010"; • when "10" => O <= "0100"; • when "11" => O <= "1000"; • when others => O <= “0000"; • end case; • end; O0 2-to-4 Decoder a O1 b O2 O3 2-to-4 Decoder 4 I (“ab”) O (“O1O2O3O4”) 2

  16. 3-state Gates • Component exhibiting three states: • Logic ‘1’ and logic ‘0’ states as in conventional gates • High impedance ‘Z’ state. • What is high impedance? • (1) The gate behaves like an open circuit – Output disconnected • (2) The circuit has no logic significance • (3) The circuit connected to a 3-state gate in high impedance is not affected by the inputs to the gate. • 3-state buffer: y = a if s = 1 Z if s = 0 a s

  17. Multiplexers constructed from 3-state buffers 2-to-1 Mux 4-to-1 Mux a MUX a y 2-to-1 b MUX b y 4-to-1 s c s0 s1 a a y 1 y d 2-to-4 Decoder s0 b b s0 2 s1 c s1 s s2 d s3

  18. VHDL Example entity 3-state_buffer is port( a: in std_logic_vector(7 downto 0); s: in std_logic; y: out std_logic_vector(7 downto 0)); end 3-state_buffer; architecture behav of 3-state_buffer is begin if s = '1' then y <= a; else y <= "ZZZZZZZZ"; end if; end; y = a if s = 1 Z if s = 0 8 a 8 s

  19. Read Only Memory (ROM) • A ROM is a memory where data are permanently stored… A memory that retains data across power cycles. • Different types of ROM: • Mask programmable (data defined during the manufacture process) • field-Programmable ROM (PROM): initialization done by user using fusible • Erasable Programmable ROM (EPROM): charge storage is used to program – UV light to erase • EEPROM: use electrical pulses instead of UV light a0 d0 2n m-bit words ROM a1 d1 m data lines n Address lines an dn

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