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大學專題說明會. 積體電路與系統組 / 電波組 呂良鴻副教授 博理館 622 室 lhlu@cc.ee.ntu.edu.tw. Research Group. Lab Information: Analog Design and System Integration (ADSI) Lab Established: September 2002 Location: BL 403 Hardware: 18 PC + 2 Workstation (SUN Blade 2000) Member: Ph. D. Students: 2 Master Students: 10
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大學專題說明會 積體電路與系統組/電波組 呂良鴻副教授 博理館622室 lhlu@cc.ee.ntu.edu.tw
Research Group • Lab Information: • Analog Design and System Integration (ADSI) Lab • Established: September 2002 • Location: BL 403 • Hardware: 18 PC + 2 Workstation (SUN Blade 2000) • Member: • Ph. D. Students: 2 • Master Students: 10 • Assistant: 1
Research Interest • RF/Microwave Integrated Circuits • Ultra-low power RF frontend circuits • RF built-in-self-test (BIST) • Si-based microwave integrated circuits • High-Speed/Broadband Integrated Circuits • 40GBs optical communication circuits • Broadband amplifiers • Reconfigurable Wireless Systems • Multi-standard/multi-band designs • Power-awareness techniqeus • TFT Circuit Designs • LTPS circuits on glass • Flexible electronics
RF/Microwave Integrated Circuits • Ultra-low power RF frontend circuits • Building Blocks • Receiver: LNA, mixer • Transmitter: PA, mixer • Research Focus • Ultra-low power design • Low-voltage design • Possible Applications • Distributed sensor network • RFID
High Speed/Broadband Integrated Circuits • System Architecture • Transmitter: MUX, retimer, frequency divider • Receiver: TIA, LA, CDR • Broadband amplifiers/drivers • Research Focus • 40GBs optical communication components • 40GBs BERT system
32-GHz/9.5-dB 46-GHz/6.7-dB 50-GHz/9.5-dB MUX DEMUX Frequency divider QVCO High Speed/Broadband Integrated Circuits • Motivation: • High-speed and broadband IC for 40-Gb/s optical communications • Implemented in standard 0.18-m CMOS process • Achievement: • Broadband distributed amplifiers: • High-speed building blocks:
L Cp Rp Rs Zin VBIAS Zin Reconfigurable Wireless Systems • Implementation of Active Inductor • Advantage • Reduced area • High Q-factor • Research Focus • Tunable inductance value • Noise and linearity study Positive Feedback Negative Feedback VB1 VB2 Zin= Re(Zin) + jIm(Zin) ≈ R + jwL Q ≡Im(Zin)/Re(Zin) ≈ wL/R Zin
TFT Circuit Designs • TFT AMOLED Pixel Circuits • a-Si TFT pixel circuits • Poly-Si TFT pixel circuits • Research Focus • Threshold compensation • Mobility compensation • Device modeling • CAD tool development
Plans for Undergraduate Special Projects • Models for Special Projects • 2~3 students as a group for one project topic • Everybody has his/her own block within the group • Regular meeting once a week • Plans for Special Projects • Paper survey/case study • CAD tool training • Circuit design and analysis • Circuit simulation and layout • Final report • Oral Presentation