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CSC 4591 – MIPS Team

CSC 4591 – MIPS Team. February 15, 2006. Intro, Hello World!. Justin Davis. Agenda. Intro, Hello World! - Justin Registers and Stacks - Sean Instruction overview - Olivia Looping programs - Kyle Pointers and Arrays - Dorota Towers of Hanoi - Brian Game time! - Ben.

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CSC 4591 – MIPS Team

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  1. CSC 4591 – MIPS Team February 15, 2006

  2. Intro, Hello World! Justin Davis

  3. Agenda • Intro, Hello World! - Justin • Registers and Stacks - Sean • Instruction overview - Olivia • Looping programs - Kyle • Pointers and Arrays - Dorota • Towers of Hanoi - Brian • Game time! - Ben CSC4591 - MIPS Presentation

  4. General facts about MIPS • Only one instruction per line • Comments start with a ‘#’ • All instructions are 32 bits long • Load/store assembly language • Five types of instructions (arithmetic, logical, data transfers, jumps, and branches) CSC4591 - MIPS Presentation

  5. Instruction Formats R-type – register instructions. (Arithmetic and logical) I-type – used by immediate and data transfer instructions J-type – used by jump instructions CSC4591 - MIPS Presentation

  6. Design Principles • Simplicity favors regularity • Same size instructions (32 bits) • Instructions adhere to a strict format • Smaller is faster • 32 registers (more registers would result in more time spent searching. • Make the common case fast • Special instructions for the constants (addi, ori, subi) • Fast addressing for conditional branches • Good design demands good compromise • Compromise between having large instruction addresses for the sake of keeping them all the same length (Speed or Space) CSC4591 - MIPS Presentation

  7. Program Example (Hello world) # Hello World Program # Hello.asm # registers: $a0 – argument register # v0 – argument returned by function .data # data segement Str: .asciiz “Hello World\n” # string declaration .text # code segment Main: li $v0, 4 # 4 = print_string la $a0, str # load str’s address into $a0 syscall # prints string to screen li $v0, 10 # 10 = exit code syscall # exits the program CSC4591 - MIPS Presentation

  8. Registers and Stacks Sean Goldberger

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  12. main () { printf("The factorial of 10 is %d\n", fact (10)); } int fact (int n) { if (n < 1) return (1); else return ( n * fact (n - 1)); } Example CSC4591 - MIPS Presentation

  13. .text • .globl main • main: • subu $sp, $sp, 32 # Stack frame is 32 bytes long • sw $ra, 20($sp) # Save return address • sw $s8, 16($sp) # Save old frame pointer • addiu $s8, $sp, 28 # Set up frame pointer • li $a0, 10 # Put argument (10) in $a0 • jal fact # Call factorial function • la $a0, $LC # Put format string in $a0 • move $a1, $v0 # Move fact result in $a0 • lw $ra, 20($sp) # Restore return address • lw $s8, 16($sp) # Call the print function • addiu $sp, $sp, 32 # Pop stack frame • jr $ra # Return to caller CSC4591 - MIPS Presentation

  14. fact: • subu $sp, $sp, 32 # Stack frame is 32 bytes long • sw $ra, 20($sp) # Save return address • sw $s8, 16($sp) # Save frame pointer • addiu $s8, $sp, 28 # Set up frame pointer • sw $a0, 0($s8) # Save argument (n) • lw $v0, 0($s8) # Load n • bgtz $v0, $L2 # Branch if n > 0 • li $v0, 1 # Return 1 • jr $L1 # Jump to code to return CSC4591 - MIPS Presentation

  15. $L1: # Result is in $v0 • lw $ra, 20($sp) # Restore $ra • lw $s8, 16($sp) # Restore $fp • addiu $sp, $sp, 32 # Pop stack • jr $ra # Return to caller • $L2: • lw $v1, 0($s8) # Load n • subu $v0, $v1, 1 # Compute n - 1 • move $a0, $v0 # Move value to $a0 • jal fact # Call factorial function • lw $v1, 0($s8) # Load n • mul $v0, $v0, $v1 # Compute fact(n - 1) * n CSC4591 - MIPS Presentation

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  18. Instructions Overview Olivia Terrell

  19. Types of MIPS Instructions • Arithmetic and logical instructions (add, subtract, multiply, divide, and, or, shift left, shift right) • Data transfer (load, store) • Conditional branch(branch, set) • Unconditional jump(jump) • Floating point • Exception and interrupt CSC4591 - MIPS Presentation

  20. Recall: • R=register addressing • I=Immediate addressing • J=jump immediate CSC4591 - MIPS Presentation

  21. ADD $rd, $rs, $rt ADDU $rd, $rs, $rt ADDI $rt, $rs, imm ADDIU $rt, $rs, imm SUB $rd, $rs, $rt SUBU $rd, $rs, $rt # rd = $rs + $rt # rd = $rs + $rt unsigned, no overflow # rd = $rs + signed constant # rd = $rs + unsigned constant, no overflow # rd = $rs - $rt # rd = $rs - $rt unsigned, no overflow Arithmetic and Logic Instructions: CSC4591 - MIPS Presentation

  22. MULT $rs, $rt MULTU $rs, $rt DIV $rs, $rt DVU $rs, $rt AND $rd, $rs, $rt ANDI $rd, $rs, imm OR $rd, $rs, $rt ORI $rd, $rs, imm Hi and Lo are now $rs * $rt signed Hi and Lo are now $rs * $rt unsigned Lo = $rs / $rt, Hi = $rs % $rt Lo = $rs / $rt, Hi = $rs % $rt unsigned $rd = $rs and $rt logical and $rd = $rs and imm logical and imm is an unsigned constant $rd = $rs or $rt logical or $rd = $rs or imm logical or imm is an unsigned constant CSC4591 - MIPS Presentation

  23. SW $rt, imm($rs) LW $rt, imm($rs) LBU $rt, imm($rs) SB $rt, imm($rs) LUI $rt, imm Mem[$rs + imm] = $rt store word in memory $rt = Mem[$rs + imm] load word from memory $rt = Mem[$rs + imm] load a byte, set bits 8 to 31 of $rt to zero Mem[$rs + imm] = $rt store a byte, bits 0 to 7 of $rt in memory $rt = imm*2^16 load constant in bits 16 to 31 of register $rt Data Transfer CSC4591 - MIPS Presentation

  24. BEQ $rs, $rt, imm BNE $rs, $rt, imm SLT $rd, $rs, $rt SLTI $rd, $rs, imm SLTU $rd, $rs, $rt SLTIU $rd, $rs, imm If $rs equals $rt, PC = PC + imm (PC is program counter) If $rs doesn't equal $rt, PC = PC + imm If $rs <$rt, $rd = 1; otherwise, $rd = 0 If $rs <imm, $rd = 1; otherwise, $rd = 0 If $rs <$rt, $rd = 1; otherwise, $rd = 0 unsigned numbers If $rs <imm, $rd = 1; otherwise, $rd = 0, unsigned numbers Conditional Branch CSC4591 - MIPS Presentation

  25. J destination JAL destination JR destination PC = address * 4, jump to destination, address is destination/4 $ra = PC, PC =address*4 PC = $rs, jump to address in $rs Unconditional Jump CSC4591 - MIPS Presentation

  26. Floating point overview Floating point registers are $f0, f1,…,f31. Even numbered registers – arithmetic ops Odd numbered registers – data transfer of the right half of the double precision of register pairs CSC4591 - MIPS Presentation

  27. Single Precision: ADD.s $f2,$f4,$f6 SUB.s $f2,$f4,$f6 MUL.s $f2,$f4,$f6 DIV.s $f2,$f4,$f6 Double Precision ADD.d $f2,$f4,$f6 .DUB.d $f2,$f4,$f6 MUL.d $f2,$f4,$f6 DIV.d $f2,$f4,$f6 $f2 = $f4 + $f6 $f2 = $f4 - $f6 $f2 = $f4 * $f6 $f2 = $f4 / $f6 $f2 = $f4 + $f6 $f2 = $f4 - $f6 $f2 = $f4 * $f6 $f2 = $f4 / $f6 Floating Point Instructions CSC4591 - MIPS Presentation

  28. LWCL $f1,100($2) SWCL $f1,100($2) BCLT 100 BCLF 100 C.LT.S $f2, $f4 S.LT.D $f2, $f4 $f1 = Mem[$2 + 100]. Load to FP register Mem[$2 + 100] = $f1. Save data to memory If condition is true, go to PC + 4 + 100 If condition is false, go to PC + 4 + 100 If $f2<$f4 condition is true, else condition is false If $f2>$f4 condition is true, else condition is false CSC4591 - MIPS Presentation

  29. Interrupts and Exceptions • Exceptions • Unexpected event from inside the processor • Arithmetic overflow, or divide-by-zero • Invalid instruction (A.K.A. a bus error) • Attempt to access protected memory • Reserved instruction call • Invoking the OS (operating system) from the program • Interrupts • Unexpected event from outside the processor (like a power failure or a reset) • I/O device request • Timer CSC4591 - MIPS Presentation

  30. When an Interrupt Happens MIPS processor processes the exception by: (1)Saving the contents of the program counter. EPC register is set to the address of either: --The faulty instruction, if the instruction was the cause of the exception. --The address of the next instruction to execute (2) PC (program counter) gets the address value --The next instruction is executed --The cause register is set to the exception type *each exception type has a code *hardware interrupt = 0, illegal memory address = 4 or 5, bus error = 6 or 7, syscall instruction = 8, int overflow = 12 and so on CSC4591 - MIPS Presentation

  31. (3) Mode of CPU changes --Processor is now in Kernel mode. CPU bit is 0 There are 2 kinds of processor mode * Kernel mode * User mode We are in Kernel mode when CPU bit is 0, (i. e. an exception has occurred), and User mode when CPU bit is 1. User address space is in range [0 to 7FFFFFFF] Kernel address space in range [80000000 to FFFFFFFF] Now, we can move on to the move instructions: CSC4591 - MIPS Presentation

  32. Move Instructionsmfc1 $rt, $fs # move from FPU to CPU: $rt = $fsmtc1 $rt, $fs #move from CPU to FPU: $fs = $rtmfc0 $rt, $rd # move from CP0 to CPU: $rt =CP0$rdmtc0 $rt, $rd # move from CPU to CP0: CP0$rd =$rtmfhi $rd # move from Hi: $rd = Hi;mflo $rd # move from Lo: $rd = Lo; FPU isfloating point processor; is like CPU. CP0 is the system control coprocessor for Exception handling

  33. if-then-else, while, switch-case Kyle West

  34. if-then-else in pseudocode main() { s3=3; s3=4; if (s3==s4) printf("s3 == s4\n"); else printf("s3 != s4\n"); exit; } CSC4591 - MIPS Presentation

  35. if-then-else in MIPS .data notequal: .asciiz "s3 != s4\n" # String equal: .asciiz "s3 == s4\n" # String .text .globl main main: li $s3, 3 # Load s3 register with a number li $s4, 4 # Load s4 register with a number # Start of if-then-else bne $s3, $s4, Else # Branch to Else if s3 != s4 li $v0, 4 # 4 = Print string la $a0, equal # Address of the string syscall # System call to print j Exit # Jump to block exit Else: li $v0, 4 # 4 = Print string la $a0, notequal # Adress of the string syscall # System call to print Exit: li $v0, 10 # 10 = Quit syscall # System call to exit CSC4591 - MIPS Presentation

  36. while-loop in pseudocode main() { s3=1; s4=5; s5=1; while (s3<s4) { printf("s3 < s4\n"); s3=s3+s5; } printf("s3 == s4\n"); exit; } CSC4591 - MIPS Presentation

  37. while-loop in MIPS .data lessthan: .asciiz "s3 < s4\n“ # String equal: .asciiz "s3 == s4\n“ # String .text .globl main main: li $s3, 1 # Load s3 register with a number li $s4, 5 # Load s4 register with a number li $s5, 1 # Load s5 with number to increment by while: blt $s3, $s4, blkstrt # Branch to blkstart if s3 < s4 j Exit # Otherwise jump to end of loop blkstrt: li $v0, 4 # 4 = Print string la $a0, lessthan # Adress of the string syscall # System call to print add $s3, $s3, $s5 # Increment s3 by number in s5 j while # Jump back to start of while loop test Exit: li $v0, 4 # 4 = Print string la $a0, equal # Adress of the string syscall # System call to print li $v0, 10 # 10 = Quit syscall # System call to exit CSC4591 - MIPS Presentation

  38. switch-case in pseudocode main() { s3=1; switch (s3) { case 1: statement1; case 2: statement2; break; default: statement3; } exit; } CSC4591 - MIPS Presentation

  39. switch-case in MIPS .data case1str: .asciiz "Case 1\n" # String case2str: .asciiz "Case 2\n" # String defaultstr: .asciiz "Default\n" # String .text .globl main main: li $s3, 1 # Load s3 register with a number # Start of switch-case beq $s3, 1, case1 # Branch to case1 if s3=1 beq $s3, 2, case2 # Branch to case2 if s3=2 b default # Branch to default case1: li $v0, 4 # 4 = Print string la $a0, case1str # Adress of the string syscall # System call to print case2: li $v0, 4 # 4 = Print string la $a0, case2str # Adress of the string syscall # System call to print b Exit # Break out of switch default: li $v0, 4 # 4 = Print string la $a0, defaultstr # Adress of the string syscall # System call to print Exit: li $v0, 10 # 10 = Quit syscall # System call to exit CSC4591 - MIPS Presentation

  40. Pointers and Arrays Dorota Badiere

  41. Pointers and Arrays • Pointers • implementation • pointer operations • dereference (*) operator • address (&) operator • Arrays • implementation • indices and addresses • relationship to pointers CSC4591 - MIPS Presentation

  42. Pointers • Pointer is a variable which contains address of some data • pointer is same size, no matter how big the data it points to is • in MIPS, 4 bytes • to get address of a variable, use address operator (&) • to access data through pointer, use dereference operator (*) CSC4591 - MIPS Presentation

  43. –42 var 0x12345678 p 0x1340CB3C Pointers: the & operator int var = -42; 0x12345678 int *p = &var; p is a pointer: it contains the address of a piece of data CSC4591 - MIPS Presentation

  44. Pointers: the & operator • In MIPS, the address operator (&) is implemented using la (load address) pseudoinstruction • la asks the assembler to determine the absolute address of a memory value, and then build real instructions to load that address into a specified register • unlike lb, lw, etc, ladoes not access memory at all, and certainly does not load the contents of the location • it just transfers its address to a GPR (General-Purpose Register) CSC4591 - MIPS Presentation

  45. data segment newline 0x10010000 stack segment $sp  num 0x7FFE3034 iptr 0x7FFE3038 cptr 0x7FFE303C $fp  0x7FFE3040 Pointers: the & operator variable memory memory name content address /* Example of pointer operations (part 1). */ char newline = '\n'; int main() { int num = 42; int *iptr; char *cptr; /* Get addresses of vars. */ cptr = &newline; iptr = &num; /* program continues later ... */ '\n' (10) 42 0x7FFE3034 0x10010000 CSC4591 - MIPS Presentation

  46. Pointers: the & operator /* Example of pointer operations (part 1). */ char newline = '\n'; int main() { int num = 42; int *iptr; char *cptr; /* Get addresses of vars. */ cptr = &newline; iptr = &num; /* program continues later ... */ .data newline: # allocate one char. .byte '\n' .text main: # allocate 12 bytes of locals move $fp, $sp # frame ptr subu $sp, $sp, 12 # Initialize num = 42. li $t0, 42 # $t0=42 sw $t0, -12($fp) # num=42 # cptr = &newline; la $t1, newline # $t1=&newl.. sw $t1, -4($fp) # cptr=$t1 # iptr = &num; la $t2, -12($fp) # $t2=&num sw $t2, -8($fp) # iptr=$t2 # more... CSC4591 - MIPS Presentation

  47. la in data/stack segments • in the assignment of: cptr = &newline • address of newline is known to assembler from its symbol table as 0x10010000 • assembler builds instructions to load this compile-time 32-bit constant into $t1: la $t1, newlinelui $at, 0x1001ori $t1, $at, 0x0000 • in the assignment of: iptr = &num • absolute address of the stack segment item num is a compile-time unknown ($fp=?,$sp=?) • but from stack diagram programmer can express it in frame pointer relative terms: &num = $fp -12 • in assembler’s format this is -12($fp) and it builds this run-time address computation in one real: la $t2, -12($fp)addiu $t2, $fp, -12 CSC4591 - MIPS Presentation

  48. Pointers: the * operator • In MIPS, dereference operator (*) implemented using load instructions • lb, lh, lw, depending on size of thing being pointed to (8, 16, or 32 bits) • or store instructions (sb, sh, sw) if dereference is on left side of assignment • Load pointer value (the data’s address) into register $reg with lw • Load data itself using the address 0($reg) lw $t1, a_ptr # $t1 = a_ptr (assume global) lw $t2, 0($t1) # $t2 = *a_ptr = mem[$t1+0] • could use : lw $t1, 0($t1) to save registers CSC4591 - MIPS Presentation

  49. Pointers: the * operator /* Pointers, part 2. */ /* This doesn’t use pointers (yet): */ /* Print num then newline. */ printf("%d", num); putc(newline); /* more later ... */ # continued... # printf("%d", num); li $v0, 1 # print int lw $a0, -12($fp) # num syscall # Syscall 11 prints one # character (in $a0). # putc(newline); li $v0, 11 # print char lbu $a0, newline syscall # more... CSC4591 - MIPS Presentation

  50. Pointers: the * operator # continued... # *iptr = 87; li $t0, 87 # $t0=87 lw $t1, -8($fp) # $t1=iptr sw $t0, 0($t1) # *iptr=87 # printf("%d", *iptr); li $v0, 1 # print int lw $t0, -8($fp) # $t0=iptr lw $a0, 0($t0) # $a0=*iptr syscall # putc(*cptr); li $v0, 11 # print char lw $t0, -4($fp) # $t0=cptr lbu $a0, 0($t0) # $a0=*cptr syscall move $sp, $fp # fix stack li $v0, 10 # exit syscall /* Pointers, part 3. */ /* Change num to 87 through iptr. */ *iptr = 87; /* Print num through iptr. */ printf("%d", *iptr); /* Print newline through cptr. */ putc(*cptr); exit(0); } CSC4591 - MIPS Presentation

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