ECSE-6230 Semiconductor Devices and Models I Lecture 18

1. ECSE-6230Semiconductor Devices and Models ILecture 18 Prof. Shayla Sawyer Bldg. CII, Rooms 8225 Rensselaer Polytechnic Institute Troy, NY 12180-3590 Tel. (518)276-2164 Fax. (518)276-2990 e-mail: sawyes@rpi.edu August 16, 2014 sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html 1

2. Lecture Outline Meyer Capacitance Model Advanced Models Unified Charge Control Model Non-idealities High Field Effects Short Channel Effects

3. Capacitance Models Account for variations in the stored changes of the devices Gate electrode, conducting channel and depletion layers Parasitic capacitance and intrinsic capacitance Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summaryReproduced from Fjeldly T. A., Ytterdal T., and Shur M. (1998) Introduction to Device Modeling and Circuit Simulation, John Wiley & Sons, New York

4. Capacitance Models Accurate modeling: how inversion change and depletion charge are distributed between source and drain for different bias voltages Meyer’s capacitance model (based on SCCM) QG is the total intrinsic gate change. Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summaryReproduced from Fjeldly T. A., Ytterdal T., and Shur M. (1998) Introduction to Device Modeling and Circuit Simulation, John Wiley & Sons, New York

5. Capacitance Models Meyer’s capacitance model (based on SCCM) CGS and CGD dominated by inversion charge CGB (subthreshold regime) dominated by depletion charge Contribution of inversion charge to gate charge Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summaryReproduced from Fjeldly T. A., Ytterdal T., and Shur M. (1998) Introduction to Device Modeling and Circuit Simulation, John Wiley & Sons, New York

6. Capacitance Models Long channel Meyer Capacitances Replace VDS with VSAT to find capacitances in saturation (note: pinch off so charge assigned to source terminal)

7. Capacitance Models Long channel Meyer Capacitance in subthreshold regime (inversion charge becomes negligible compared to depletion charge) Series connection between gate oxide capacitance and depletion capacitance Body effect parameter

8. Capacitance Models Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summaryReproduced from Fjeldly T. A., Ytterdal T., and Shur M. (1998) Introduction to Device Modeling and Circuit Simulation, John Wiley & Sons, New York

9. Capacitance Models MOSFET Velocity Saturation Model Capacitance values at the saturation point are found by replacing VDS by VSAT Deep in saturation same limiting values CGS/Ci-> 2/3 and CGD/Ci->0

10. Advanced Models • Short Channel effects tend to weaken the gate control over the channel charge • Serious leakage currents (punch through) • Threshold shifts from influence of source and drain contacts over intrinsic channel and depletion charges • Drain source bias lowering injection barrier near the source (shifts in threshold voltage) sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

11. Advanced Models • Quantum mechanical tunneling through gate oxide • Channel length modulation • Bias dependence of field effect mobility • Hot electron induced impact ionization near the drain sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

12. Advanced Models • The Simple Charge Control Model (SCCM) considers the subthreshold regime as an off-state (ideally blocking all drain current) • In reality there is leakage current • The Unified Charge Control Model (UCCM) covers both the above and below threshold regimes with continuous expressions • VF(x) is the quasi-Fermi potential in the channel measured relative to the Fermi potential (α close to unity bulk effect parameter) sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

13. Advanced Models • Above threshold in strong inversion • VF can be replaced by V(x) • Linear term in ns(x) dominates • Below threshold, the logarithmic term dominates sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

14. Advanced Models • Shur et al. created the Unified MOSFET Model based on UCCM • Gives straightforward parameter extraction • Accounts for short channel effects • Incorporated into the AIM-SPICE circuit simulator sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

15. Modeling Nonideal Effects: High Field Effects • Channel-length modulation • Simplified expression links VDs to the length of the saturated region • Vp, Vα, l are parameters related to the electron saturation velocity, field mobility, and drain conductance in the saturation regime • Vp is the potential at the point of saturation in the channel, which is usually approximated by the saturation voltage VSAT. • CLM manifests as a increasing output conductance with increasing gate bias sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

16. Modeling Nonideal Effects: High Field Effects • Hot carrier effects • Main concerns in the deep sub-micrometer regime • Increasing field strengths in the channel causes acceleration and heating of the charge carriers • Manifestation, breakdown and substrate current caused by impact ionization • Creation of interface states • Gate current from hot electron emission Ids channel current, Ai and Bi are the ionization constants, VSAT is the saturation voltage Id is the effective ionization length Subthreshold VSAT=0 sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

17. Modeling Nonideal Effects: High Field Effects • Gate bias-dependent mobility • Gate dielectric is thin, a few nanometers in 0.1 µm devies • Electron are confined to narrow region at Si-SiO2 interface • Causes scattering by surface nonuniformities • Reduction in field effect mobility in comparison to bulk silicon Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summary Reproduced from Park C. K. et al. (1991) A unified charge control model for long channel n-MOSFETs, IEEE Trans. Electron Devices, ED-38, 399–406 sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

18. Modeling Nonideal Effects: Short Channel Effects • Aspect Ratio • FET dimensions are scaled by preserving the aspect ratio • Between gate lengths and active vertical dimension of the device • For MOSFET, vertical dimensions accounts for: • oxide thickness di, • drain and source junction depths rj, • source and drain depletion depths Ws and WD • Empirical relationship to determine transition between long channel and short channel device sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

19. Modeling Nonideal Effects: Short Channel Effects • Aspect Ratio: DIBL and Charge Sharing • Large shift in VT with decreasing L because of gate charge sharing with drain and source depletion regions, also drain effect on source (DIBL) • Vto(L) describes scaling of VT at zero drain bias resulting in charge sharing • σ(L) is the channel length dependent DIBL parameter • Changes UCCM expression to be sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html

20. Modeling Nonideal Effects: Short Channel Effects • Aspect Ratio: DIBL and Charge Sharing Online reference: http://onlinelibrary.wiley.com/doi/10.1002/0470863803.ch1/summary Reproduced from Fjeldly T. A. and Shur M. (1993) Threshold voltage modeling and the subthreshold regime of operation of shortchannel MOSFETs, IEEE Trans. Electron Devices, TED-40, 137–145 sawyes@rpi.edu www.rpi.edu/~sawyes/courses.html