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Chapter 5 Tutorial 5a. Editing and Assembling

Chapter 5 Tutorial 5a. Editing and Assembling. From Valvano. Program T5a.1. PTT equ $0240 DDRT equ $0242 org $4000 ;EEPROM main lds #4000 ; sp =>RAM bsr init l oop staa PTT ;output inca bra loop init ldaa #$FF

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Chapter 5 Tutorial 5a. Editing and Assembling

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  1. Chapter 5Tutorial 5a. Editing and Assembling From Valvano

  2. Program T5a.1 • PTT equ $0240 • DDRT equ $0242 • org $4000 ;EEPROM • main lds #4000 ;sp=>RAM • bsrinit • loop staa PTT ;output • inca • bra loop • initldaa #$FF • staa DDRT ;outputs • clra • rts • org $FFFE ;EEPROM • fdb main ;reset vector

  3. Assembly Process • Pass 1—create the symbol table • Question 5a.1 Determine the addressing mode for each instruction. • PTT equ $0240 • DDRT equ $0242 • org $F000 • main lds #$4000 ;immediate • bsrinit ;PC relative • loop staa PTT ;extended • inca ;inherent • bra loop ;PC relative • initldaa #$FF ;immediate • staa DDRT ;extended • clra ;inherent • rts ;inherent • org $FFFE • fdb main

  4. Assembly Process • Question 5a.2 Determine the size of each instruction (Freescale instruction manual)—equ and org do not create object code but fdb, fcb, and gcc do create object code and will have sizes. • PTT equ $0240 • DDRT equ $0242 • org $F000 • main lds #$4000 ;3 • bsrinit ;2 • loop staa PTT ;3 • inca ;1 • bra loop ;2 • Initldaa #$FF ;2 • staa DDRT ;3 • clra ;1 • rts ;1 • org $FFFE • fdb main ;2

  5. Assembly Process • Question 5a.3 Finish pass 1 by creating the symbol table. Use the sizes and the org to find the address of each line. • $0240 PTT equ $0240 • $0242 DDRT equ $0242 • org $F000 • $F000 main lds #$4000 • $F003 bsrinit ;2 • $F005 loop staa PTT ;3 • $F008 inca ;1 • $F009 bra loop ;2 • $F00B Initldaa #$FF ;2 • $F00D staa DDRT ;3 • $F010 clra ;1 • $F011 rts ;1 • org $FFFE • $FFFE fdb main ;2

  6. Symbol Table • DDRT $0242 • PTT $0240 • init $F00B • loop $F005 • main $F000

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