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Design of Class-D Audio Amplifiers

Design of Class-D Audio Amplifiers. Chun-Hsien Su 中央大學電機系 蘇純賢 chunsu@ee.ncu.edu.tw. May 17, 2006. OUTLINE. 1. Introduction of Class-D Audio Amplifier. 2. Large-Power Class-D Applications. 3. Integrated Class-D Audio Power Stages. 4. Sigma-Delta Class-D Audio Amplifiers.

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Design of Class-D Audio Amplifiers

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  1. Design of Class-D Audio Amplifiers Chun-Hsien Su 中央大學電機系 蘇純賢 chunsu@ee.ncu.edu.tw May 17, 2006

  2. OUTLINE 1. Introduction of Class-D Audio Amplifier 2. Large-Power Class-D Applications 3. Integrated Class-D Audio Power Stages 4. Sigma-Delta Class-D Audio Amplifiers 5. Conclusions Chun-Hsien Su

  3. Introduction of Class-D Audio Amplifier – Traditional Class-AB Amplifier  Class AB amplifier uses linear regulating transistors to modulate output voltage. η = 30% at temp rise test condition. Chun-Hsien Su

  4. Introduction of Class-D Audio Amplifier – Class-D Audio Amplifier  Class D amplifier uses MOSFETs that are either ON or OFF. • PWM technique is used to express analog audio signals with ON or OFF states in output devices. Chun-Hsien Su

  5. Basic PWM Operation Chun-Hsien Su

  6. Audio Output Spectral Density Fundamental Carrier and modulated signals LC-filtered Chun-Hsien Su

  7. Topology Comparison: Class AB vs. Class D Chun-Hsien Su

  8. Efficiency: Class AB vs. Class D [From TI’s report] Chun-Hsien Su

  9. Measured Efficiency [From TI’s data] – TI-TPA2000D4 Chun-Hsien Su

  10. Temperature vs. Output Power – Class-D Advantage: Less Heat Chun-Hsien Su

  11. Battery Life A head to head test of TI’s class-AB and class-D ~1W mono solutions: Class-AB - TPA731 Class-D - TPA2001D Both set-up on the PnP platform powered by 3x1.2V NiMH batteries driving a typical 8-Ω speaker used in wireless applications. Chun-Hsien Su

  12. Battery Life A head to head test of TI’s class-AB and class-D ~1W mono solutions: Class-AB - TPA731 Class-D - TPA2001D Both set-up on the PnP platform powered by 3x1.2V NiMH batteries driving a typical 8-Ω speaker used in wireless applications. Chun-Hsien Su

  13. Analogy to Buck DC-DC Converter Chun-Hsien Su

  14. Loss in Power Device Chun-Hsien Su

  15. Full Bridge versus Half Bridge – Full Bridge – Full Bridge Chun-Hsien Su

  16. Full Bridge versus Half Bridge (Cont.) Chun-Hsien Su

  17. Feedback PWM Gate Driver Audio source Major Cause of Imperfection Switch nonidealities Finite Ron Body diode Recovery (EMI) Architecture Analog/digital w/SDM Poor PSRR Noise coupling Nonlinear LC Modulation error Dead time Quantization error Delay time Single-bridge/Full bridge Filterless modulation scheme Chun-Hsien Su

  18. THD and Dead Time Chun-Hsien Su

  19. Shoot Through and Dead Time - Shoot through charge increases rapidly as dead time gets shorter. - Need to consider manufacturing tolerances and temperature characteristics. Chun-Hsien Su

  20. Power Supply Pumping - Significant at low frequency output - Significant at low load impedance - Significant at small bus capacitors - Largest at duty = 25%, and 75% Chun-Hsien Su

  21. EMI consideration: Qrr in Body Diode 1. Low side drains inductor current 2. During dead time body diode of low side conducts and keep inductor current flow 3. At the moment high side is turned ON after dead time, the body diode is still conducting to wipe away minority carrier charge stored in the duration of forward conduction.  This current generates large high frequency current waveform and causes EMI noises. Chun-Hsien Su

  22. Gate Driver: Why is it Needed? • Gate of MOSFET is a capacitor to be charged and discharged. Typical effective capacitance is 2nF.  High side needs to have a gate voltage referenced to it’s Source. Gate voltage must be 10-15V higher than the drain voltage. Need to control HS and LS independently to have dead time. Chun-Hsien Su

  23. Functional Block Diagram Inside Gate Driver • High side needs to have a gate voltage referenced to it’s Source. • With the addition of few components, they provide very fast switching speeds and low power dissipation.  Need to control HS and LS independently to have dead time. Chun-Hsien Su

  24. Bootstrap High Side Power Supply When Vs is pulled down to ground through the low side FET, the bootstrap capacitor (CBOOT) charges through the bootstrap diode (Dbs) from the Vcc supply, thus providing a supply to Vbs. Chun-Hsien Su

  25. Power Dissipation in Gate Driver Whenever a capacitor is charged or discharged through a resistor, half of energy that goes into the capacitance is dissipated in the resistor. Thus, the losses in the gate drive resistance, internal and external to the MGD, for one complete cycle is the following: Chun-Hsien Su

  26. Power Dissipation in Gate Driver (Cont’d) • The use of gate resistors reduces the amount of gate drive power that is dissipated inside the MGD by the ratio of the respective resistances. • These losses are not • temperature dependent. Chun-Hsien Su

  27. MOSFET Power Switch A MOSFET is a voltage-controlled power switch. A voltage must be applied between Gate and Source terminals to produce a flow of current in the Drain. Chun-Hsien Su

  28. Key Parameters of Power MOSFETs (1). Voltage Rating, BVDSS : Drain-source breakdown voltage. Temperature dependent. (2). Gate Charge, Qg : Directly related to MOSFET speed Temperature dependent. (3). D-to-S On-Resistance, RDS(ON) : Directly related to MOSFET conduction losses. Temperature dependent. (4). Body Diode Reverse Recovery Characteristics, Qrr, trr , Irr , and S factor. Influence THD, EMI, and Efficiency. Temperature dependent. (5). Package : Power dissipation capability, current capability, internal inductance, internal resistance, electrical isolation, and mounting process. Chun-Hsien Su

  29. Voltage Rating, BVDSS  This is the drain-source breakdown voltage (with VGS = 0). BVDSS should be greater than or equal to the rated voltage of the device, at the specified leakage current, normally measured at Id=250uA. • This parameter is temperature-dependent and frequently ∆BVDSS/∆Tj (V/°C) is specified on datasheets. • BVDSS MOSFET voltages are available from tens to thousand volts. Chun-Hsien Su

  30. Gate Charge, Qg  parameter is directly related to the MOSFET speed and is temperatureindependent. Lower Qg results in faster switching speeds and consequently lower switching losses.  The total gate charge has two main components: the gate source charge, Qgs and, the gate-drain charge, Qgd (often called the Miller charge). Chun-Hsien Su

  31. D-to-S On-Resistance, RDS(ON)  This is the drain-source resistance, typically specified on data sheet at 25°C with VGS = 10V. RDS(ON) parameter is temperature-dependent, and is directly related to the MOSFET conduction losses. lower RDS(ON) results in lower conduction losses. Chun-Hsien Su

  32. Body Diode Reverse Recovery Characteristics, Qrr, trr , Irr , and S Factor • Power MOSFETs inherently have an integral reverse body-drain diode. This body diode exhibits reverse recovery characteristics. Reverse Recovery Charge Qrr, Reverse Recovery Time trr, Reverse Recovery Current Irr and Softness factor (S = tb/ta), are typically specified on data sheets at 25°C and di/dt = 100A/us. • Power recovery characteristics are temperature-dependent and lower trr, Irr and Qrr improves THD, EMI and Efficiency η. Chun-Hsien Su

  33. Package • MOSFETs devices are available in several packages as SO-8,TO-220, D-Pak, I-Pak, TO-262, DirectFET™, etc. • The selection of a MOSFET package for a specific application depends on the package characteristics such as dimensions, power dissipation capability, current capability, internal inductance, internal resistance, electrical isolation and mounting process. Chun-Hsien Su

  34. Choosing the MOSFET Voltage Rating MOSFET voltage rating for a Class D amplifier is determined by: – Desired POUT and load impedance (i.e. 250W on 4Ω) – Topology (Full Bridge or Half Bridge) – Modulation Factor M (80-90%) Chun-Hsien Su

  35. Trends in Class-D Audio Amplifiers –Make it smaller!  higher efficiency  smaller package  Half Bridge –Make it sound better!  THD improvement  fully digitally processed modulator Chun-Hsien Su

  36. Trends in Class-D (1) – Patent Blooming since Y2K US Patent Class 330/207A – Class-D Amplifier 50+ Patent # 40 33 30 25 15 13 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 Chun-Hsien Su

  37. Trends in Class-D (2) – Systems by ICs Bipolar CMOS DMOS (double-diffused MOS) DMOS features: • It is a (lateral) double-diffused MOS transistor. • The device is asymmetrical. • A lightly doped Nwell(extended drain) region supports high drain voltages. • The thin gate oxide allows a high device but restricts • The Pbody is shorted to source of device in metal 1. Chun-Hsien Su

  38. Trends in Class-D (3) – Full versus Half, Performance versus Cost Full Bridge Half Bridge Chun-Hsien Su

  39. Trends in Class-D (4) – Performance Improved by Analog FB Loop Similar: Yokoyama 4504793 1985/3/12 US Patent : 6300825, issued 2001/10/9“PWM with feedback loop Integrator”  This structure improves output waveform & PSRR.  This patent can be avoided by using different architecture. Chun-Hsien Su

  40. Trends in Class-D (5) – Filterless Modulation for Portable Applications Gate Driver Information in pulse width Information in phase US Patent : 6262632, issued 2001/7/17“Concept and method to enable filterless, efficient operation of Class-D amplifiers”  Limits the development of small-power (~1W) class-D amplifier.  Can be solved by using different modulation schemes. Chun-Hsien Su

  41. Trends in Class-D (6) – Performance Improvement by Sigma-Delta? PWM The power efficiency and the signal-to-noise ratio (SNR) for a amplifier based on the above scheme are compared with the values typical of linear and PWM amplifiers of the same rated power. The power efficiency of the solution is an intermediate value between the linear and PWM amplifiers, whereas SNR mainly depends on the modulator type adopted. A SNR around 60–70 dB was estimated by adopting a fourth-order modulator. However, this value can be significantly improved by increasing the switching frequency or the modulator order. Delta Sigma-Delta [Dallago, Tran. CAS-I, Aug, 1997] Chun-Hsien Su

  42. Trend in Class D Amplifiers In any case, to extend the power range of high-frequency modulation, future studies should be oriented in the following direction: (1). Reduction of power circuit parasitic capacitance by technological improvement of both semiconductor and magnetic devices; (2). Adoption of soft-switching schemes able to perform a larger exploitation of converter parasitic parameters under a load range that is as wide as possible; (3). development of extended modulation techniques (for example of multilevel type or nonconstant switching period type or, generally, of hybrid type) allowing a lower switching frequency under the same baseband performance. Chun-Hsien Su

  43. PWM versus PDM THD Class-D CT SDM PWM Comparator Run-free Clocked 1-b PDM Output PWM 1-bit PDM Min. pulse Width 1/fs fs<1MHz 1/fs fs>1MHz For second-order  M fs=40kHzx128=5.12MHz Drive H-bridge OK May burn out Open-loop, Full-bridge, low-OSR M with bit grouping High-order Single-bit M Bit flipping (bit grouping) Audio source Gate Driver (d & a) (digital) (digital) Chun-Hsien Su

  44.  Class-D Amplifier Dual noise-shaper architecture - Simple, almost all digitized Audio source Digital M  Grouping Gate Driver + - Waveform Represent m-bit AD PCM Class AB /Class D Amplifier Speaker Interpolator  Noise Shaper 1/m-bit DAC CT filter PCM  Class D Amplifier Speaker Interpolator  Noise Shaper Chun-Hsien Su

  45. Conclusion – Highly efficient Class D amplifiers now provide similar performance to conventional Class AB amplifiers -If key components are carefullyselected and the layout takesinto account the subtle, yet significant impact due toparasitic components. – Constant innovation in semiconductor technologies helps the growing Class D amplifiers usage due to improvements in higher efficiency, increased power density and better audio performance. Trends in class-D: half-bridge filterless scheme, analog-feedback loop to improve performance. – All-digital Sigma-delta class-D  Future work. Chun-Hsien Su

  46. References [1]. M. Berkhout, “An integrated 200-W Class-D audio amplifer,” IEEE J. Solid-State Circuits, vol. 38, pp. 1198–1206, July 2003. [2]. H. Ballan, M. Declercq, and J. U. Duncombe, “12 V - Class-D amplifier in 5 V CMOS technology,” in Proc. IEEE CICC, 1995, pp. 559–562. [3]. E. Dallago, “Advances in high-frequency power conversion by deltasigma modulation,” IEEE Trans. Circuits Syst. I, vol. 44, pp. 712–721, Aug. 1997. [4]. Marco Berkhout, “An integrated 200 W class-D audio amplifier,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1198–1206, Jul. 2003. [5]. Jun Honda and Jorge Cerezo, IRA Technical Report. Chun-Hsien Su

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