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Stop Watch. Sean Hicks Dongpu Jin ELEC 307 Project 2 Instructor: Alvaro Pinto April/12/2011. Overview. Background and Theory Specification Explanation Summary Work to Be Done Conclusion. Background and Theory. We are modeling a stop watch using a FPGA board.
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Stop Watch Sean Hicks Dongpu Jin ELEC 307 Project 2 Instructor: Alvaro Pinto April/12/2011
Overview • Background and Theory • Specification • Explanation • Summary • Work to Be Done • Conclusion
Background and Theory • We are modeling a stop watch using a FPGA board. • This stop watch has the most commonly used functionalities: • Count, Pause and Reset.
Background and Theory • This is a hardware and software co-design project. • Models are written in VHDL. • Individual model and the entire system will be tested using simulators. • Design will be implemented on a FPGA board.
Specification • Hardware: • Altera DE II board with: • Cyclone II FPGA • On board 50MHz internal clock • On board seven segments LEDs • On board push buttons • Software: • AlteraQuartus • ModelSim • VHDL
Specification 50MHz Clock FPGA 7-Seg LEDs Push buttons
Explanation • Primarily Design: • Behavioral Model • State Transition
Explanation • We have tested this model using ModelSim, and it works fine.
Explanation • This model does not work in Quartus. So we moved to develop a Structural Model. • Inputs: • reset, run, pause, 50MHz internal clock. • Outputs: • five 7-segment LEDs display each digits.
Explanation • Components: • 10Hz Clock Converter, mod 10 counter, mod 6 counter, 7-seg decoder.
Summary • Each component and the entire system has been tested using waveform in Quartus. • The entire system also has been tested on FPGA.
Work to Be Done • We have done the experiment part of this project. • Just need to write the report.
Conclusion • This concludes our presentations of Project 2- Stop Watch. • Any questions?
Conclusion • Thanks for your attention!