CENG 334 – Operating Systems 06- Memory

1. CENG 334 – Operating Systems06- Memory Asst. Prof. Yusuf Sahillioğlu Computer Eng. Dept, , Turkey

2. Memory Management • Program must be brought (from disk) into memory to run • Main memory and registers are only storage CPU can access directly • Register access in one CPU clock cycle (perform multiplication a * b) • Main memory can take many cycles (read the operands from memory, or write result back to memory) • Cache sits between main memory and CPU registers (2-3 cycles) • Instructions that are executed and data that is operated on • Protection of memory required to ensure correct operation

3. Memory Management • Overview

4. Memory Management • When code is generated (or assembly program is written) we use memory addresses for varaibles, functions, and branching/jumping • Those addresses can be physical or logical (=virtual) memory addreses • Physical: discontinuous locations • in main memory. • Logical:

5. Memory Management • When code is generated (or assembly program is written) we use memory addresses for varaibles, functions, and branching/jumping • Those addresses can be physical or logical (=virtual) memory addreses • Physical: • Logical: each process is given its own • continuous logical memory space = own • view of memory with its own addr. space • Logical addresses divided into fixed-size • pages.

6. Memory Management • Key advantage of logical addressing (= paging). • Eliminates the issue of external fragmentation. • Since CPU translates logical page-based addresses to physical frame-based addresses there is no need for the physical frames to be continuous

7. Memory Management • Physical address of a variable is 0x0734432. That variable has to sit there while the program is executing: no relocation. • Logical address of a variable is 7 for myArray[7]. Not has to sit at physical 0x0000007 (7 in hexadecimal).

8. Memory Management • Assume physical addresses in use: no problem

9. Memory Management • Assume physical addresses in use for 2 parallel programs: problem

10. Memory Management • We cannot have a multiprogramming environment. • We cannot load a program to an arbitrary position. • Early systems have this physical addressing idea. Thank god we don’t.

11. Memory Management • Logical address space concept. • A program uses logical addresses. • Logical address space has to be mapped somewhere in physical (main) memory.

12. Memory Management • Logical addresses provide • Multiprogramming environment • Relocatable code • Binding: mapping logical addresses to physical addresses. • physicalAddr = logicalAddr + base • Logical address space is bound to a physical address space

13. Memory Management • An example

14. Memory Management • An example

15. Memory Management • An example • Memory Mananagement Unit (MMU) converts logical address 28 into physical address (28 + 24 = 52  M[52]) in execution time.

16. Memory Management • Hardware device that at run time maps virtual (logical) to physical address • In prev simple example we used 1 relocation register: base • More complicated schemes around • The user program deals with logical addresses; it never sees the real physical addresses • Execution-time binding occurs when reference is made to location in memory • Logical address bound to physical addresses

17. Memory Management • Dynamic relocation using a relocation register

18. Memory Management • Another memo management idea: Swapping • Assume 10 programs loaded into memo and memory is filled up • A process can be swapped temporarily out of memory to a backing store (disk), and then brought back into memo for continued execution • Started if more than threshold amount of memory allocated • Disabled again once memory demand reduced below threshold

19. Memory Management • Another memo management idea: Swapping

20. Memory Management • Contiguous allocation (continuous): allocate physical space that is equal to process’ logical address space • Main memory usually into two partitions: • Resident operating system, usually held in low memory with interrupt vector • User processes then held in high memory • Relocation registers used to protect user processes from each other, and from changing operating-system code and data • Base register contains value of smallest physical address • Limit register contains range of logical addresses (size of the program): each logical address must be less than the limit register • MMU maps logical address dynamically

21. Memory Management • HW support for relocation and limit registers

22. Memory Management • Contiguous allocation • After a while we see partitions, some of which are empty (hole).

23. Memory Management • Contiguous allocation • Multiple-partition allocation • Degree of multiprogramming limited by number of partitions • Hole: block of available memory; holes of various size are scattered throughout memory • When a process arrives, it is allocated memory from a hole large enough to accommodate it • Process exiting frees its partition, adjacent free partitions combined • Operating system maintains information about:a) allocated partitions b) free partitions (hole)

24. Memory Management • Contiguous allocation • How to satsify a request of size n from a list of free holes? • First-fit: Allocate the first hole that is big enough • Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size • Produces the smallest leftover hole • Worst-fit: Allocate the largest hole; must also search entire list • Produces the largest leftover hole

25. Memory Management • Fragmentation: There will be useless holes that cannot accommodate any process continuously • External Fragmentation: external to allocated partitions you have unused space • Total memory space exists to satisfy a request, but it is not contiguous • Reduce external fragmentation by compaction: • Shuffle memory contents to place all free memory together in 1 large block • Internal Fragmentation: allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used

26. Memory Management • More advanced idea for memory management: Paging • Used for implementing virtual memory which allows a program whose size is > physical memory size to be run • Also good for eliminating the external fragmentation • Allows logical and physical address spaces to be noncontiguous • High utilization of memory space

27. Memory Management • More advanced idea for memory management: Paging • Divide physical memory into fixed-sized blocks called frames • Size is power of 2, between 512 bytes and 16 Mbytes • Divide logical memory into blocks of same size called pages • Keep track of all free frames • To run a program of size N pages, need to find N free frames and load program • Set up a page table to translate logical to physical addresses • Not a simple translation anymore: phyAddr != logAddr + base

28. Memory Management • More advanced idea for memory management: Paging

29. Memory Management • More advanced idea for memory management: Paging • Divide physical memory into fixed-size blocks, called (page) frames. • Page frame is a container that can hold a content which is a page.

30. Memory Management • More advanced idea for memory management: Paging • Divide physical memo into fixed-size (4K) blocks, called (page) frames. • Frame0 has address space from 0 to 4095, frame1 has 4096 to 8191, ..

31. Memory Management • More advanced idea for memory management: Paging • Divide logical address space into fixed-size blocks, called pages, whose size is equal to the page frame size (4K) • Frame0 has address space from 0 to 4095, frame1 has 4096 to 8191, ..

32. Memory Management • More advanced idea for memory management: Paging • Divide logical address space into fixed-size blocks, called pages, whose size is equal to the page frame size (4K) • When program loaded into memo, allocation not have to be contiguous

33. Memory Management • More advanced idea for memory management: Paging • Divide logical address space into fixed-size blocks, called pages, whose size is equal to the page frame size (4K) • When program loaded into memo, allocation not have to be contiguous • Info is kept in • a Page Table

34. Memory Management • More advanced idea for memory management: Paging • Divide logical address space into fixed-size blocks, called pages, whose size is equal to the page frame size (4K) • When program loaded into memo, allocation not have to be contiguous • Info is kept in • a Page Table, • determined by OS, • for each process • Conversion logical->physical done by HW (CPU)

35. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Assume pageSize = 4 bytes • pageNumber = 1 & offset = 3 for h • LA = 7; PA = ? • PA = 4*6 + 3 = 27

36. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Assume pageSize = 4 bytes • _ _ _ _ //4bit logical address • First _ _ for page number • Next _ _ for offset (displacement) • inside page • Logical address of h is 0111

37. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Assume pageSize = 4 bytes • LA for f = 5; PA = ? • Logical address is 0101 (5 in binary) • Page number = 01 1 in decimal • PA = 110 01 (Frame number = 6) • Offset will not change ‘cos it is relative position; copy from LA • 110 01 = 25 in decimal, which is the PA case for f

38. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Assume pageSize = 4 bytes • LA for l = 11; PA = ? • Logical address is 1011 (11 in binary) • Page number = 10 2 in decimal • PA = 001 11 (Frame number = 1) • Offset will not change ‘cos it is relative position; copy from LA • 001 11 = 7 in decimal, which is the PA case for l

39. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Assume pageSize = 4 bytes • LA for n = 13; PA = ? • Logical address is 1101 (13 in binary) • Page number = 11 3 in decimal • PA = 010 01 (Frame number = 2) • Offset will not change ‘cos it is relative position; copy from LA • 010 01 = 9 in decimal, which is the PA case for n

40. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • In general • Address generated by CPU is divided into: • Page number (p): used as an index into a page table which contains base address of each page in physical memory • Page offset (d): combined with base address to define the physical memory address that is sent to the memory unit • For given logical address space 2m and page size 2n

41. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • In general

42. Memory Management • More advanced idea for memory management: Paging • Conversion logical->physical done by HW (CPU) • Must be very fast ‘cos done for every memory reference • At least 1 memory access to fetch the instruction • Plus potential memory operation(s) for that instruction (LOAD) • Setting up the page table done by SW (OS) • When program is loaded into memo, OS knows into which frames the pages of the program are loaded

43. Memory Management • More advanced idea for memory management: Paging • We will have free and used frames in memory at any time t

44. Memory Management • More advanced idea for memory management: Paging • 8-byte long program (each byte is an instruction, not a char, but anyway)

45. Memory Management • Implementation of Page Table • Page table is kept in main memory, per process • Page-table base register (PTBR) points to the page table (load with context switch) • Page-table length register (PTLR) indicates size of the page table (load with cs) • In this scheme every data/instruction access requires two memory accesses: 1 for the page table (‘cos table is in memory) and 1 for the data/instruction (by phy adr)

46. Memory Management • Implementation of Page Table • Access to Page Table in memory (for logical  physical conversion) • Access to that physical address in memory (2nd access)

47. Memory Management • Implementation of Page Table • The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) • Some TLBs store address-space identifiers (ASIDs) in each TLB entry: uniquely identifies each process to provide address-space protection for that process • After we learn page  frame, we store this association in 1 entry of TLB. • A page has 4096 instructions so it is likely that I’ll access the same page again soon (in the next instruction); keep that page  frame mapping in the cache. • Without ASIDs you have to flush (erase) TLB at every context switch (0  17 of P1 may not work for P2). • TLBs typically small (64 to 1,024 entries)

48. Memory Management • TLB associative memory • Associative memory: parallel search • Address translation (p, d) • If p is in associative register, get frame # out • Otherwise get frame # from page table in memory

49. Memory Management • Paging HW with TLB

50. Memory Management • Effective memory access time w/ Paging HW with TLB • Associative Lookup = e time unit //e = epsilon • Assume memory access (cycle) time is 1 msec (>> e) • Hit ratio = alpha • Hit ratio: percentage of times that a page number is found in the TLB • Effective Access Time (EAT) • EAT = HIT + MISS • = (1 + e)alpha + (2 + e)(1 – alpha) • = 2 + e – alpha msecs //e << alpha so ignore it