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Status Report: January 2005. Silicon Construction Activities WBS 1.1 Silicon M&O WBS 3.1. A. Seiden UC Santa Cruz. Organization. Institutions SUNY Albany Iowa State University UC Berkeley/LBNL University of New Mexico Ohio State University University of Oklahoma/Langston Univ.
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Status Report: January 2005 Silicon Construction Activities WBS 1.1 Silicon M&O WBS 3.1 A. Seiden UC Santa Cruz
Organization Institutions SUNY Albany Iowa State University UC Berkeley/LBNL University of New Mexico Ohio State University University of Oklahoma/Langston Univ. UC Santa Cruz University of Wisconsin Management 1.1.1 Pixels (Gilchriese) 1.1.1.1 Mechanics/Services (Gilchriese, Anderssen) 1.1.1.2 Sensors (Seidel, Hoeferkamp) 1.1.1.3 Electronics (Einsweiler, Denes) 1.1.1.4 Hybrids (Skubic, Boyd, Gan) 1.1.1.5 Modules (Garcia-Sciveres, Goozen) 1.1.2 Silicon Strips (Seiden) 1.1.2.1 IC Electronics (Grillo, Spencer) 1.1.2.2 Hybrids (Ciocio, Senior Techs) 1.1.2.3 Modules (Haber, Senior Techs) 1.1.3 RODs (Jared, Joseph) (Physicist, Engineer or Senior Tech)
1.1.1. Pixel System Disk Sectors Endcone Barrel Layers Disk Rings Disk Frame Barrel Frame Endplate Disk Ring Mounts LBNL mechanical responsibilities shown in red (Services not shown) Pixel Size is 50x400 microns
Beam Pipe Support Structure Pixel Detector Beam Pipe Support Structure Beam Pipe Service Panels PP1b Corrugated Panels installation configuration Pixel and Beam Pipe Assembly About 7m long package assembled on surface and lowered into collision hall for insertion into detector in July 2006. Pixel support tube not shown LBNL mechanical responsibilities shown in red
Pixel Status - Overview • Technical status excellent. • Production complete or underway for all elements. • In-pit installation date moved from April ’06 to July ‘06 • Pixel-collaboration-wide scope increase to allow production of 3rd pixel hit components. Keep assembly lines rolling. • Significant delays incurred in some areas – bare module production (not a US responsibility), optical boards (shared US and non-US) and services (US). • Delays + scope increase (services) have resulted in cost increase but within estimates of contingency last year. • Kevin Einsweiler elected to be Pixel Project Leader starting February 2005.
1.1.1.1 Pixel Status - Mechanics • Trial fit at CERN of US barrel support frame, German barrel shells and prototype beampipe using Italian tooling – November 2004 • Trial assembly of disk regions at LBNL – December 2004
1.1.1.1 Pixel Status - Mechanics • Fabrication of all carbon-fiber-resin composite parts completed December 2004 • Assembly (gluing or connecting composite parts together) of pixel support tube underway. • Assembly of beam pipe support structure underway • Initial trial insertion tests completed successfully • Final insertion tests (using all real structures) start next month at LBNL.
1.1.1.1 Pixel Status - Services • Wire harnesses for power, HV and slow control. • Heat exchanger piping and custom fittings for coolant system • Fiber optic connections, including custom connections • Mechanical supports for all these • Very complex. Not enough space. Have been delays in design and difficulties in fabrication of prototypes(harnesses) • Scope increased to include 3rd hit. • Production start delayed, but now underway. Projected completion end 2005.
1.1.1.2 Pixel Status - Sensors • Wafer testing at University of New Mexico is complete – excellent performance. • Have sensors in hand for 2-hit system. 3rd hit order(Italy and Germany) placed. • Remaining wafer testing all in Europe to save US $.
Module Control Chip Manages data & control between module’s 16 chips Optical interface chips Front End Chip 2880 channels Doric (from PIN diode to decoded LVDS) VDC array (from LVDS to laser diodes) 1.1.1.3 Pixel Status - Electronics Wafer production complete. Near end of testing. Yield much better than planned Complete Complete
1.1.1.3 Pixel Status – FE Electronics • Wafer deliveries complete. • Wafer testing to be complete by about April 2005. • Have enough good die already for 2-hit system. • Yield so far is about ??%
1.1.1.4 Pixel Status – Flex Hybrids • Work is essentially complete at Oklahoma. • Flex completed for 3rd hit(no net cost increase)
1.1.1.4 Pixel Status – Optical Hybrids • Ohio State, Siegen/Wuppertal, Taiwan responsibility. Ohio State lead in board production. • Have had significant technical problems over last year in realizing high-yield production and in organization of parts delivery. • Now solved. Ten preproduction boards made and tested at OSU. Yield ???. • BeO production order in fabrication. Other parts done or on track. • About 6 month delay incurred. Pre-production optical board for B-layer
1.1.1.5 Pixel Status - Modules • Bare module (front-end electronics bump bonded to sensors) solely EU responsibility • Two vendors in production • IZM in Germany • AMS in Italy • Production rate below planned. • This is the pixel critical path item. • EU working to increase rate
1.1.1.5 Pixel Status - Modules • Module assembly and testing within collaboration can easily keep pace with current bare module delivery rate. • Production mounting of modules on mechanical supports started in US in September ‘04. Ahead of EU by some months. • US has to mount about 20% of modules, but currently receiving 40% of bare modules since ahead and to meet US schedule. Production modules mounted on disk sector
Pixel Work at CERN • Sub-assembly shipment to CERN will begin about June 2005. • First end section (3 disks) will be used as “10%” test vehicle by Fall 2005 to get DAQ/DCS systems up and running so that testing of fully assembled detector in 2006 goes more smoothly. US lead. • Final assembly and reception testing of services from US to be done at CERN in 2005. Space identified. US lead. • Final integration of active elements, services and beampipe will be very challenging. • Overall collaboration planning for CERN phase just starting. Availability of EU manpower resident at CERN is an issue. • US installation funding focused almost exclusively on critical mechanical engineering and technical labor and associated costs for residence at CERN up to installation in pit.
1.1.2 SCT Module SCT Module Integrated circuits(ABCD) Silicon detector Baseboard Hybrid
1.1.2 SCT Module Production • DONE! May 3 Aug 3 Sep 21 Aug 11 580 SB’s 563 Modules 543 Shipped Apr 1
1.1.3 ROD (Read Out Driver) Read Out Driver (ROD) slave DSPs & memories power supplies program FLASH boot FPGA ROD bus buffers router FPGAs event builder FPGA controller FPGA debug & derandomizing memories master DSP & memory realtimedatapath dataformatterFPGAs 8
1.1.3 Silicon Read Out Driver The Read Out Driver (ROD) is the interface between the Silicon Strip (SCT) and pixel modules and the Data Acquisition System. Prototypes of the ROD were designed, fabricated, and successfully tested in extensive user evaluations. Production, expected during the summer was, however, delayed because of a VME interface problem. The ROD VME interface in VME slots 5-9 failed to interact properly with the VME master interface in the host computer. Consequently the ROD VME interface was changed to a different implementation. Rev F RODs (17 ea) were fabricated and extensively tested for VME problems and user evaluation was performed. The Rev F RODs are identical to the Rev E RODs with the exception of the VME interface. The Rev E RODs are classified as emergency spares because of the slot limits above, to be used only if there are no Rev F RODs available. Production of the remaining 193 Rev F RODs was started in late FY04 when it was clear that there were no known problems. Richard Jared
WBS 1.1.3 Silicon Read Out Driver ROD Costs: Funds Available FY 05: Carry Over 344k$ New Funds 30k$ Installation 125k$ Total funds FY 05 499k$ ROD Fabrication and Debugging Costs (WBS 1.1.3.8): Liens: Lien ROD front panels 0.5k$ Lien Naprotek Ass RODs 79.3k$ Lien Avnet summary lien 1.2k$ Lien Arrow summary lien 1.4k$ Lien TTM PC boards 200 RODs 800 DSPs 52.8k$ Lien Tellrite assemble 800 DSPs 15k$ Lien replace crate back plane 2k$+ Lien misc. 3.8k$ Total fabrication Liens 156k$ Purchase burden 9.65% 15k$ Total Purchase Cost 171k$ 171k$ Debugging/testing Labor: Engineering 2 months -42k$ Technician 4 months -42k$ Total Labor -84k$ 84k$ Installation (WBS 1.1.3.9): Material 34k$ Labor 89.6k$ 123.6k$ Total Installation 123.6k$ Lien ROD Crates (WBS 1.1.3.8.4) 105k$ 105k$ Project management (WBS 1.1.3.10) 15k$ 15k$ Total Planned Cost 499k$
WBS 1.1.3 Silicon Read Out Driver ROD Needs: Needed Spares Consumables Total Deliverables Pixel 86 9 7 102 95 SCT 92 9 7 108 101 Totals 178 18 14 210 196 Oct 2004 Dec 2004 Apr 2005 Sep 2005 Oct 2005 Pixel Rev F 0 0 16 32 95 SCT Rev F 16 35 101 101 101 Cumulative number of RODS Available from Fabrication: Aug 2004 Nov 2004 Dec 2004 Jan 2005 Feb 2005 RODs 17 37 118 210 All Deliverable RODs debugged Fabrication Schedule: All printed circuit boards Fabricated Nov 4, 2004 Start loading of PC cards Nov 22, 2004 Delivery of RODs at 20 per week End of loading PC cards Jan 30, 2005 Testing/debugging (difficult cards will be saved to end of production) of cards will lag fabrication by 1 week Burn in of cards complete Mar 30, 2005 Installation will go on till the end of the year
WBS 3.1: M & O To date M&O has been for shared activities at CERN (M&O B, mainly costs to outfit the SR building) and for spares. The SR building is now ready to receive the various detector elements (barrels and disk layers to begin arriving very soon). Spares: $100k for spare RODs was spent (FY03 funds) during purchase of ROD components and boards. $100k for spare SCT modules has been spent (FY04 funds). These modules were completed at tail-end of module construction. FY05 plan is to complete spares. Will build spare pixel modules, including optoboards. Parts exist, cost is about $60K.
M&O FY05 and Beyond In FY05 begin pre-operations for SCT and RODs. Areas follow unique construction responsibilities. For example, electronics system engineering for the SCT. We will have to deal with any grounding and shielding problems, and also any problems with modules constructed in the U.S. RODs are entirely a U.S. deliverable and we will have to make them work as a system. Plan: 1.5 FTE for SCT, 1.25 FTE for RODs in FY05.
M&O FY05 and Beyond In FY06, besides the pre-operations of the SCT and RODs, we will start pre-operations for the pixel system. We have many unique responsibilities in the mechanics, support structure, electronics, and services. These all require experienced technical personnel during pre-operations. Plan: 2.9 FTE in FY06 for pixels.
WBS 3.1.3 Silicon Read Out Driver • The ROD is a flexible design that is based on FPGAs that use synthesized VHDL for the firmware and DSPs that use compiled C code. This design allows for upgrades in the firmware and software as new needs are understood by use of the SCT and Pixel communities. The SCT/Pixel ROD is one of the most complex ROD designs in ATLAS. Maintenance and upgrades will be required for the life of the ROD. Most of the activities will be in the first few years of pre operation and early operation. A competent staff and the tools needed to support the ROD must be maintained for the life of the ROD. The activities fall into 6 main areas listed below: • Software Support • Firmware Support • Maintenance • Licences • Material • Support at CERN
WBS 3.1.3 Silicon Read Out Driver Software Support: The software is divided into 3 main areas. One is the common infrastructure code that supports the basic operation of the ROD. Some of the basic operations include, configuring the ROD, providing event data to tasks, handling primitives (a primitive supports operations such as read/write access to a specific register, or starting a task, etc), error processing, and handling of communication. In summary, all of the infrastructure required to make the ROD function. Wisconsin has written and will maintain this software long term. It is a large volume of code with tens of thousands of lines of code. There is an ongoing effort to improve and upgrade this software that will continue to evolve as the SCT and pixel communities use the RODs and find new desires and needs. The 2 remaining areas of code are the SCT and Pixel specific code. Up to this point Wisconsin had written almost all of this code because the user communities have not been able to commit manpower. The Pixel community has been able to provide code in two areas (fitting and generation of serial stream to configure modules). The original plan was to have the user communities supply code specific to there subsystem because one institution can not supply the needs in a timely manner and would have to interpret the needs. This consolidation of software would result in a bottle neck in the execution of their needs and dissatisfaction.
WBS 3.1.3 Silicon Read Out Driver Software Support Continued: Subsystem specific software is still the goal. At this time the pixel community is starting to take ownership or some section of code and should have ownership by the end of the year. SCT still does not have manpower but should be able to begin an active role as the construction of the SCT disks and barrels are completed near the end of the year. Wisconsin will continue to support these areas till the SCT and pixel communities can take ownership. Examples of subsystem code are histogramming task, error counting task, generation of serial module configuration streams, occupancy task, control of subsystem specific triggers during calibration, analysis programs, generation of primitives specific to a subsystem, subsystem specific monitoring and etc. It is expected that some of the infrastructure and firmware will need to be changed as the SCT and pixel communities become more active. Software effort is expected to be constant for FY 05-07. This effort will be used to maintain/improve the existing code, train subsystem personnel on how to take ownership of their part and help in finding problems in the system. The estimates below are based on engineering judgement. FY 05-07 60k$ per year, 9 man-months per year FY 08 30k$ per year, 4.5 man-months per year
WBS 3.1.3 Silicon Read Out Driver Firmware Support: Firmware support is composed of the VHDL code that determines how the logic in the FPGAs provides the functionality needed in the ROD. This firmware is functional. Firmware has been used in the user evaluation to test the ROD functionality. Problems have been found and corrected. The firmware has been simulated with test vectors. Unfortunately it is not possible to have test vector that cover 100% of the cases in a complex system such as the ROD. More defects will be found with use. Experience has shown that even when the ROD meets the requirement there are new needs that result in changes. An example of a change could be the algorithm that selects an event to be trapped in the Router and transmitted to the slave DSPs. This area has had much discussion with the user community but it is expected that with more use specific new traps will be needed to trap a specific type of event. There are many other examples such as how the error counting is done in the EFB. There will also be changes in the firmware as some of the C code function are changed to VHDL for simplicity of speed reasons. It is very important that for the life of the ROD to have a competent staff to maintained firmware support. Maintenance of tool and computers necessary to support the VHDL code base will be necessary long after it is obsolete. The estimate is based on experience in last two years and judgement. FY 05 65k$ (3 man-months of eng.) to support changes/correction/updates to the VHDL as full functionality is put in the ROD and supervision/help of the technical effort. FY 06 42k$ (2 man-months of eng.) to support changes during detector commissioning an supervision/help of technical effort. FY 07 41k$ (2 man-months of eng.) to support changes during early running and supervision/help of technical effort. FY 08 30k$ (1.5 man-months of eng.) to support refinement as the users gain experience running.
WBS 3.1.3 Silicon Read Out Driver Maintenance Support: Maintenance is composed of repairing defective RODs. The defects will be from infant mortality, damage due to handling, shipping damage, normal failure and stupid mistakes. Infant mortality is beyond our control and defective units will need to be repaired. Damage due to handling will be reduced by instruction (done for the current users) users of the ROD. We did have one case of a ROD being damaged in a crate. The host processor was also damaged. The cause is unknown. Shipping of ROD is done with electrostatic packaging and padding to minimize shock. No damage from shipping has been reported at this time. We are projecting failures of 10-20% to be on the safe side. There can also be problem with lightning or a power supply in incorrect operation. Things of this nature such as the damage detailed above could damage a crate (16) of RODs. Having qualified technicians (to repair RODs) and engineering (covered by firmware effort) is essential to repair of defective RODs that allows SCT and pixels to perform with a full set of modules. FY 05-07 42k$ (4 mm of tech per year) Effort needed to repair RODs that do not function and effort to maintain expertise of the technician effort. FY 08 30k$ (3 mm of technician) Effort needed to repair RODs that do not function and effort to maintain expertise of the technician effort. Licences support: Licences are for C and VHDL compilers and hardware simulators. The costs are minimal, 4k per year for the first 3-4 years (until obsolete) and then maintaining in compatible hardware for the life of the experiment. FY 05 0k$ Construction project pays cost. FY 06-08 4k$ per year to cover cost of licences.
WBS 3.1.3 Silicon Read Out Driver Material: It will be necessary to maintain the supply of spare parts and as necessary purchase life time purchases of parts that are becoming obsolete. This parts purchasing will be active in the first 1-2 years and then decrees to a low level of a 2-3 thousand per year. Personal computers (about 2 ) will need to be upgrade the support software in the first 1-4 year. Services such as replacing a ball grid array FPGA that have become defective at a cost of $200. FY 05 10k$ = 6k$ long term spares of FPGAs and DSPs.+ 2k$ general parts + 2k$ replace ball grid arrays (10 ea.) FY 06 10k$ = 1k$ long term spares + 2k$ general parts + 2 k$ replace ball grid arrays + 4k$ personnel computer FY 07 5k$ = 1k$ general parts + 4k$ personnel computer FY 08 5k$ = 3k$ general parts + 2k$ replace ball grid array Support at CERN: Support at CERN will be mainly in the commissioning and early running period. It is expected that 2 trips (5 weeks per 2 trips) (labor cost included below) will be required twice over the four year period to find complex problems in the ROD system FY 05 5k$ One trip to CERN of 1 week (labor included) FY 06 30k$ Two trips to CERN, 1 of 4 weeks and 1 trip of one week (Commissioning) FY 07 30k$ Two trips to CERN, 1 of 4 weeks and 1 trip of one week (early running) FY 08 7k$ One trip to CERN of about one week
WBS 3.1.3 Silicon Read Out Driver Funding Profile: FY 05 FY 06 FY 07 FY 08 Software Support 60k$ 60 60 30 Firmware Support 65 45 43 30 Maintenance 43 42 41 30 Licences 0 4 4 4 Material 10 10 5 5 Support at CERN 5 30 30 7 Total 183k$ 191 183 106