On Using SAT to Ordered Escape Problems

1. On Using SAT to Ordered Escape Problems Lijuan Luo and Martin D.F. Wong University of Illinois at Urbana-Champaign ASPDAC 2009

2. Outline • Introduction • Original SAT Formulation • Formulation for Cyclic Escape Ordering • SAT for Clustering-Structure Problems • SAT for Rip-up and Reroute • Experimental Results • Conclusion

3. Introduction • With ever increasing pin counts on denser boards, existing CAD tools fail to provide an automatic solution to board-level routing. • This paper considers the ordered escape routing problem which is a key problem in board-level routing.

4. Introduction • Ordered escape routing problem • Input: • A pin array component. • A required ordering of escaped pins on the component boundary. • Objective: • Find disjoint paths to route all pins within the pin array to the component boundary while satisfying the escape pin ordering.

5. Introduction 4-side escape

6. Introduction • The most recent work [1] is the only one that actually solves ordered escape. • However, [1] assumes that when traversing along the boundary clockwise starting from the left topmost corner, the first net must always be net 1. • [1] L. Luo and M.D.F. Wong “Ordered Escape Routing Based on Boolean Satisfiability”, Proc. of ASP-DAC, pp. 244-249, 2008.

7. Introduction

8. Introduction • This paper improves SAT router to support the cyclic ordering. • Apply SAT router for large-scale problems with clustering structure. • SAT router is used as a general rip-up and reroute technique to fix the escape solution obtained by any heuristic router.

9. Original SAT Formulations • For a given pin array, constructs its corresponding routing grid G.

10. Original SAT Formulations • Three types of nodes: • Each free grid cell is called a grid node. • Each pin is called a pin node. • Each slot is called a slot node. • An edge is a connection between two neighboring nodes. • Each pin can only connect “diagonally” to four neighboring grid nodes in the NW, NE, SW, SE directions. • Each pin-slot connection can only be horizontal or vertical.

11. Original SAT Formulations • Three types of Boolean variables: grid variable, slot variable and edge variable. • The escape routing problem can be transformed into a SAT problem of the form F=FGFEFPFS=1 • Slot variable is the binary representation of the index of the net exiting the pin array at that slot. • Use Si to stand for the ith slot, and si for the slot variable, the constraint for escape ordering Fs is: Fs=s1≤s2 ≤s3 ≤ … ≤sn (2)

12. Formulation for Cyclic Escape Ordering • Redefine a slot variable as the concatenation of a flag bit and a net-index vector. • The net-index part is exactly the original slot variable. • The flag bit is the most significant bit of the new slot variable.

13. Formulation for Cyclic Escape Ordering • Assume net 1 escapes at Si (i>1), then the net-index part of si is 0, the net-index part of si-1 must be greater than 0, because Si-1 can only be used by net 2, 3, etc. • In order to satisfy formula 2, si-1<si, the flag bit of si-1 must be 0, while the flag bit of si must be 1. • The flag bit of a slot is 1 if it is within the range of [Si, Sn]; 0 otherwise.

14. Formulation for Cyclic Escape Ordering

15. Formulation for Cyclic Escape Ordering • Add another constraint formula Fs’ for slot variables. • Fα is the boundary constraint for flag bits: • If net 1 exits from the slot, the net-index part is 0. • The flag bit of this slot should be 1 and the flag bit of the slot in front of it should be 0. • fi is the flag bit of si and Ni is a Boolean vector of the net-index part of si.

16. Formulation for Cyclic Escape Ordering • Logical implication “a=>b” is equivalent to “a’+b”

17. Formulation for Cyclic Escape Ordering • Fβ is the constraint for consistent flag bits: • If a slot Si has a flag bit equal to 1, then all the slots within the range of (Si, Sn] should also have flag bits equal to 1.

18. Formulation for Cyclic Escape Ordering • Fγ is the boundary constraint for the net-index parts of the slot variables. • Make sure Nn<=N1

19. SAT for Clustering-Structure Problems • Large-scale escape problems have a clear clustering structure, i.e., pins can be grouped into several disjoint clusters. • Instead of escaping the whole component altogether using out SAT approach. • Escape each cluster separately using SAT router.

20. SAT for Clustering-Structure Problems Convert global planning into another escape problem and take advantage of SAT router to search for multiple solutions

21. SAT for Clustering-Structure Problems • To get multiple escape solutions is to run SAT router repeatedly with a new solution each time. • To avoid the appearance of duplicate patterns, a constraint is added to the SAT formulation each time after we get a new solution.

22. SAT for Clustering-Structure Problems • After getting the solution in (a), we add the following constraint formula: • Make it equal to 1 means that we can not have e1, e6, e8 and e11 equal to 1 at the same time.

23. SAT for Rip-up and Reroute • SAT router can also be used as a rip-up and reroute technique to fix the escape solution obtained by any other router. • Use some heuristic algorithms to get an initial solution very quickly. • If there are some unrouted nets, we zoom in on the unrouted regions and make use of SAT router to complete the escape.

24. SAT for Rip-up and Reroute

25. Experimental Results

26. Experimental Results

27. Experimental Results

28. Experimental Results

29. Conclusion • This paper improved the original SAT router to handle cyclic ordering. • Extend SAT for large-scale problems: clustering structure and a rip-up and reroute technique to fix the routing solution.