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Computer Architecture CSE 3322. Lecture 2. Why Study Computer Architecture. Learn to Design Computers Processors Designed by Few Semiconductor Companies. Why Study Computer Architecture. Learn to Design Computers Processors Designed by Few Semiconductor Companies
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Computer Architecture CSE 3322 Lecture 2
Why Study Computer Architecture • Learn to Design Computers • Processors Designed by Few Semiconductor Companies
Why Study Computer Architecture • Learn to Design Computers • Processors Designed by Few Semiconductor Companies • Learn to Design Device Controllers
Why Study Computer Architecture • Learn to Design Computers • Processors Designed by Few Semiconductor Companies • Learn to Design Device Controllers • Learn to Design More Optimum Software!
Why Study Computer Architecture • Learn to Design Computers • Processors Designed by Few Semiconductor Companies • Learn to Design Device Controllers • Learn to Design More Optimum Software! • Learn to Design More Optimum Systems!
How to Improve Application Performance ? • Algorithm • Language and Compiler • Processor and Memory System • I/O System and Devices
Technological Growth • DRAM Growth: 4X Capacity Every 3 Years
Technological Growth • DRAM Growth: 4X Capacity Every 3 Years • Workstation Performance Improvement: 54% per year or 2X every18 months
Technological Growth • DRAM Growth: 4X Capacity Every 3 Years • Workstation Performance Improvement: 54% per year or 2X every18 months • Disk Drive Growth: Capacity More than 2x every year
Technological Growth • DRAM Growth: 4X Capacity Every 3 Years • Workstation Performance Improvement: 54% per year or 2X every18 months • Disk Drive Growth: Capacity More than 2x every year • All Continue to Drive Price /Performance Improvements
Five Components of Computers Memory Control Input Datapath Output Processor
Instruction Set Design • Key Element in the Architecture • Function, Cost, Performance, etc.
Instruction Set Design • Key Element in the Architecture • Function, Cost, Performance, etc. • Typical Machine Instructions • Data Transfers ( reg-reg, reg-mem, mem-reg) • Arithmetic (add, subtract, multiply) • Logic & String (boolean, bit manipulations) • Program Control ( branches, jumps) • Input/Output Operations
Instruction Set Design Study the MIPS Architecture
Instruction Set Design Study the MIPS Architecture • A WORD is 32 bits or 4 bytes wide for • Registers and Memory
Instruction Set Design Study the MIPS Architecture • A WORD is 32 bits or 4 bytes wide for • Registers and Memory • Each byte has Memory Address starting at 0
Instruction Set Design Study the MIPS Architecture • A WORD is 32 bits or 4 bytes wide for • Registers and Memory • Each byte has Memory Address starting at 0 • WORD Addresses start at 0 and are multiples of 4
Instruction Set Design Study the MIPS Architecture • A WORD is 32 bits or 4 bytes wide for • Registers and Memory • Each byte has Memory Address starting at 0 • WORD Addresses start at 0 and are multiples of 4 • Big-endian Byte 0, Byte 1, Byte 2, Byte 3 • Little-endian Byte 3, Byte 2, Byte 1, Byte 0
Instruction Set Design Study the MIPS Architecture • A WORD is 32 bits or 4 bytes wide for • Registers and Memory • Each byte has Memory Address starting at 0 • WORD Addresses start at 0 and are multiples of 4 • Big-endian Byte 0, Byte 1, Byte 2, Byte 3 • Little-endian Byte 3, Byte 2, Byte 1, Byte 0 • 32 Registers with Conventions on Use
Memory N bM Registers 31 • 8 b11 b10 b9 b8 • 4 b7 b6 b5 b4 1 0 0 b3 b2 b1 b0 32 bits 32 bits
MIPS Assembly Instructions Instruction Example Meaning add add $s1, $s2, $s3 $s1 = $s2 + $s3 subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 $s1, $s2, $s3, … are registers. The $ indicates a Register in the MIPS Assembly Language
MIPS Assembly Instructions Instruction Example Meaning add add $s1, $s2, $s3 $s1 = $s2 + $s3 subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 $s1, $s2, $s3, … are registers. The $ indicates a Register in the MIPS Assembly Language Also $s2 + $s3 $s1
Machine Instruction Format R Type Instruction Instr Format op rs rt rd shamt funct add R 0 reg reg reg 0 32 sub R 0 reg reg reg 0 34 bits 6 5 5 5 5 6 op : opcode rd : register destination operand rs : reg source 1 operand shamt : shift amount rt : reg source 2 operand funct : function code – variant of operation
Machine Instruction Format add $t0, $s2, $t0 where $t0 is reg 8, $s2 is reg 18 $t0 = $s2 + $t0 Instr Format op rs rt rd shamt funct add R 0 18 8 8 0 32 bits 6 5 5 5 5 6
Machine Instruction Format add $t0, $s2, $t0 where $t0 is reg 8, $s2 is reg 18 $t0 = $s2 + $t0 Instr Format op rs rt rd shamt funct add R 0 18 8 8 0 32 bits 6 5 5 5 5 6 Example of Machine Language Instruction op rs rt rd shamt funct 0 18 8 8 0 32 000000 10010 01000 01000 00000 100000