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Special Topic-I PLL Basics and Design

Special Topic-I PLL Basics and Design. By, A nil K umar Ram Rakhyani (akram). What is it?. PLL = Phase Lock Loop A circuit which synchronizes an adjustable oscillator with another oscillator by the comparison of phase between the two signals.

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Special Topic-I PLL Basics and Design

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  1. Special Topic-I PLL Basics and Design By, Anil Kumar Ram Rakhyani (akram)

  2. What is it? • PLL = Phase Lock Loop • A circuit which synchronizes an adjustable oscillator with another oscillator by the comparison of phase between the two signals. • An electronic circuit that synchronizes itself to an external reference signal.

  3. What is it for? • To generate High Frequency Clock in Microprocessor. • In Mobile Communication to generate Carrier Frequency. • Can you think of any other Application? Actually there are many.

  4. What does Industry say? • ST Microelectronics has vacancies for “PLL Designers”. • Texas Instruments (TI) want to recruit “PLL designers”. • A lot more Opportunities…….. • Why it is so challenging?

  5. Basic Block Diagram

  6. 1.Voltage Controlled Oscillator (VCO) • What it does? • Requirements: • High Frequency Operation • Good Programmability Range • Less sensitive to environment • Basic Model: Fout =K * Vin • Different Oscillators in literature. How to Select? • A simple Example: Ring Oscillator • Common Challenges: • Programmability Range ( Giga-Hertz Order) • Maximum Noise limit

  7. 2. Divider • What it Does? • Requirements: • Should work on High Frequency( Giga Hertz Order) • Should be less power Consuming • Challenges: • Power Consumption (Power is proprotional to frequency) • Switching Speed.

  8. 3. Phase-Frequency Detector (PFD) • What it does? • Requirement: • High Sensitivity • Moderate Frequency Operation • Challenges: • Linearity of PFD • Gain of PFD

  9. 4. Loop Filter • Functionality • Low pass filter • Filters out noise of PLL loop

  10. Control Model of PLL

  11. Some definitions: • Order of PLL – Highest degree of polynomial of characteristics equation (1+ G(s)H(s)) • Type of PLL – No of poles of loop Transfer function (G(s)H(s)) locate at origin

  12. Food for Thought • What will be the resolution in terms of frequency of PLL? How will you increase it? • What changes you need to do to achieve above goal? • What will be specifications of PLL? • What is the performance metric of VCO? • For Microprocessor? • For Transmitter/Receiver IC?

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