By: Mudassar Raza

1. Memory Management By: Mudassar Raza Department of Computer Sciences, COMSATS Institute of Information Technology,The Mall Wah Cantt, Pakistan

2. Memory Management consists of many tasks, including Being aware of what parts of the memory are in use and which parts are not Allocating memory to processes when they request it and de-allocating memory when a process releases it Moving data from memory to disc, when the physical capacity becomes full, and vice versa. Memory Management

3. Only allow a single process in memory and only allow one process to run at any one time Very Simple No swapping of processes to disc when we run out of memory No problems in having separate processes in memory Even this simple scheme has its problems. Operating system can be seen as a process Additional Problems Monoprograming is unacceptable as multi-programming is expected Multiprogramming makes more effective use of the CPU Could allow only a single process in memory at any one time but allow multi-programming i.e. swap out to disc Context switch would take time Monoprogramming

4. Probabilistic model A process spends p percent of its time waiting for I/O There are n processes in memory The probability that all n processes are waiting for I/O (CPU is idle) is pn The CPU utilization is then given by CPU Utilization = 1 - pn Modelling Multiprogramming

5. Accept that mulitiprogramming is a good idea How do we to organise the available memory? One method is to divide the memory into fixed sized partitions Partitions can be of different sizes but their size remain fixed Partition 4 700K Partition 3 400K Partition 2 200K Partition 1 100K OS 0 Mulitprogramming with Fixed Partitions

6. Memory divided into four partitions When job arrives it is placed in the input queue for the smallest partition that will accommodate it Just have a single input queue where all jobs are held When a partition becomes free we search the queue looking for the first job that fits into the partition Mulitprogramming with Fixed Partitions

7. Drawbacks As the partition sizes are fixed, any space not used by a particular job is lost. It may not be easy to state how big a partition a particular job needs. If a job is placed in (say) queue there it may be prevented from running by other jobs waiting (and using) that partition. Mulitprogramming with Fixed Partitions

8. Alternative search strategy Search the entire input queue looking for the largest job that fits into the partition Do not waste a large partition on a small job but smaller jobs are discriminated against Have at least one small partition or ensure that small jobs only get skipped a certain number of times. Mulitprogramming with Fixed Partitions

9. Compile time: If you know that at compile time where the process reside, absolute code can be generated; must recompile code if starting location changes. Load time: Must generate relocatable code if memory location is not known at compile time. Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. Need hardware support for address maps (e.g., base and limit registers). Binding of Instructions and Data to Memory Address binding of instructions and data to memory addresses canhappen at three different stages.

10. The concept of a logical address space that is bound to a separate physicaladdress space is central to proper memory management. Logical address – generated by the CPU; also referred to as virtual address. Physical address – address seen by the memory unit. Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addresses differ in execution-time address-binding scheme. User generate 0 to Max Logical vs. Physical Address Space

11. Run time mapping by a Hardware device that maps virtual to physical address. In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory. The user program deals with logical addresses; it never sees the real physical addresses. Memory-Management Unit (MMU)

12. Routine is not loaded until it is called Better memory-space utilization; unused routine is never loaded. Useful when large amounts of code are needed to handle infrequently occurring cases. No special support from the operating system is required implemented through program design. Example : Sort For Large Data On the Disk Dynamic Loading

13. Linking postponed until execution time. Small piece of code, stub, used to locate the appropriate memory-resident library routine. Stub replaces itself with the address of the routine, and executes the routine. Operating system needed to check if routine is in memory. Dynamic linking is particularly useful for libraries. Dynamic Linking

14. A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution. Assume a multiprogramming environment with a round robin CPU scheduling algorithm. When a quantum expires the memory manager will start to swap out the process that just finished and to swap another process into the memory space that has been freed. In the meantime, the CPU scheduler will allocate a time slice to some other process in memory. When each process finishes its quantum it will be swapped with another process. Swapping

15. A variant of this swapping policy is used for priority based scheduling algorithm. If a higher priority process arrives and wants service, the memory manager can swap out the lower priority process and then load and execute the higher priority process. When the higher priority process finishes the lower priority process can be swapped back in and continued. This variant of swapping is sometimes called roll out, roll in. Swapping

16. Backing store – Commonly a fast disk. It must be large enough to accommodate copies of all memory images for all users, and it must provide direct access to these memory images. The system maintains a ready queue consisting of all processes whose memory images are on the backing store or in memory and are ready to run. Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped. Context Switching Example: Book Silberschatz Page: 325 6ed Swapping

17. Main memory usually into two partitions: Resident operating system, usually held in low memory with interrupt vector. User processes then held in high memory. Single-partition allocation Relocation-register scheme used to protect user processes from each other, and from changing operating-system code and data. Relocation register contains value of smallest physical address; limit register contains range of logical addresses – each logical address must be less than the limit register. Contiguous Allocation

18. Contiguous Allocation

19. Contiguous Allocation

20. Contiguous Allocation OS OS OS OS process 5 process 5 process 5 process 5 process 9 process 9 process 8 process 10 process 2 process 2 process 2 process 2

21. First-fit: Allocate the first hole that is big enough. Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size. Produces the smallest leftover hole. Worst-fit: Allocate the largest hole; must also search entire list. Produces the largest leftover hole. Dynamic Storage-Allocation Problem How to satisfy a request of size n from a list of free holes. First-fit and best-fit better than worst-fit in terms of speed and storage utilization.

22. External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous. Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used. Reduce external fragmentation by compaction Shuffle memory contents to place all free memory together in one large block. Compaction is possible only if relocation is dynamic, and is done at execution time. Fragmentation

23. Each process “thinks” that it is running on its own dedicated machine, with memory addresses from 0 to bound base = 6250 code data … stack 6250 + bound Base-and-Bound Translation Virtual addresses Physical addresses 0 code data … stack bound

24. A reasonable compromize to overcome disadvantages of both fixed and variable partitionning schemes A modified form is used in Unix SVR4 for kernal memory allocation Memory blocks are available in size of 2^{K} where L <= K <= U and where 2^{L} = smallest size of block allocatable 2^{U} = largest size of block allocatable (generally, the entire memory available) Buddy System

25. We start with the entire block of size 2^{U} When a request of size S is made: If 2^{U-1} < S <= 2^{U} then allocate the entire block of size 2^{U} Else, split this block into two buddies, each of size 2^{U-1} If 2^{U-2} < S <= 2^{U-1} then allocate one of the 2 buddies Otherwise one of the 2 buddies is split again This process is repeated until the smallest block greater or equal to S is generated Two buddies are coalesced whenever both of them become unallocated Buddy System

26. The OS maintains several lists of holes the i-list is the list of holes of size 2^{i} whenever a pair of buddies in the i-list occur, they are removed from that list and coalesced into a single hole in the (i+1)-list Presented with a request for an allocation of size k such that 2^{i-1} < k <= 2^{i}: the i-list is first examined if the i-list is empty, the (i+1)-list is then examined... Buddy System

27. Example of Buddy System

28. Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8192 bytes) Divide logical memory into blocks of same size called pages. Keep track of all free frames To run a program of size n pages, need to find n free frames and load program Set up a page table to translate logical to physical addresses Paging

29. Assignment of Process Pages to Free Frames

30. Assignment of Process Pages to Free Frames

31. Each process has its own page table Each page table entry contains the frame number of the corresponding page in main memory A bit is needed to indicate whether the page is in main memory or not Paging

32. Paging hardware Offset Page Number Offset

33. Paging Model of logical and physical memory

34. Paging Example

35. Free Frames Before allocation After allocation

36. Page table is kept in main memory Page-tablebase register (PTBR) points to the page table Page-table length register (PRLR) indicates size of the page table In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction. The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) Implementation of Page Table

37. Paging Hardware With TLB

38. Effective Access Time

39. Memory protection implemented by associating protection bit with each frame Valid-invalid bit attached to each entry in the page table: “valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page “invalid” indicates that the page is not in the process’ logical address space Memory Protection

40. Valid (v) or Invalid (i) Bit In A Page Table

41. Two-Level Page-Table Scheme

42. A logical address (on 32-bit machine with 4K page size) is divided into: a page number consisting of 20 bits a page offset consisting of 12 bits Since the page table is paged, the page number is further divided into: a 10-bit page number a 10-bit page offset Thus, a logical address is as follows:where pi is an index into the outer page table, and p2 is the displacement within the page of the outer page table Two-Level Paging Example page number page offset p2 pi d 10 12 10

43. Address-translation scheme for a two-level 32-bit paging architecture Address-Translation Scheme

44. Physical address Physical page offset Context Tbl Ptr register Context Tbl 12 Bits 24 Bits PTD Level 1 Level 2 PTD Level 3 PTD Context register 12 bit PTE 6 bits 8 bits 6 bits 12 bits Virtual address 4096 index 1 index 2 index 3 offset virtual page

45. Example Page Sizes Computer Page Size Atlas 512 48-bit words Honeywell-Multics 1024 36-bit word IBM 370/XA and 370/ESA 4 Kbytes VAX family 512 bytes IBM AS/400 512 bytes DEC Alpha 8 Kbytes MIPS 4 kbyes to 16 Mbytes UltraSPARC 8 Kbytes to 4 Mbytes Pentium 4 Kbytes or 4 Mbytes PowerPc 4 Kbytes

46. Virtual Memory

47. Virtual memory – separation of users logical memory from physical memory. Only part of the program needs to be in memory for execution. Logical address space can therefore be much larger than physical address space. Need to allow pages to be swapped in and out. Virtual memory can be implemented via: Demand paging Demand segmentation Background

48. Bring a page into memory only when it is needed. Less I/O needed Less memory needed Faster response More users Page is needed implies a reference to it invalid reference  abort not-in-memory  bring to memory Demand Paging

49. With each page table entry a valid–invalid bit is associated(1  in-memory, 0 not-in-memory) Initially valid–invalid bit is set to 0 on all entries. Example of a page table snapshot. During address translation, if valid–invalid bit in page table entry is 0  page fault. Valid-Invalid Bit Frame # valid-invalid bit 1 1 1 1 0  0 0 page table