EE330 Final Design Project

1. EE330 Final Design Project Ryan C. Semler Fall 2009

2. What we need to do • Design a new safety chip for an auto maker. • Needs to have an auto-braking feature. • Needs to have multiple sensor inputs to determine which airbags to deploy, and when. • Needs to be compatible with the circuitry given by the manufacturer.

3. What we are given • The input from the sonar is an 8 bit bus with a 39KHz clock signal. • The output to the airbag system is a 3 bit bus. • The output to the braking system is a 4 bit bus. • The vehicle will have have 2 frontal impact sensors, a door impact sensor in each door, a passenger detector, and an accelerometer

4. The first step • Develop a truth table for my given inputs, and potential outputs. • This will help troubleshooting of the circuit there are problems during the design process. • Things to note right away: • Braking output is discrete, there are only 16 outputs for a possible 256 inputs. • Braking output will be maximum at 140KPH-255KPH. • Braking can only be turned on when the clock signal is on rising edge.

5. Continued: Things to Note • The airbag system does not deploy passenger side curtain airbag when both the drivers, and passengers door are in a collision. • The airbag system will only deploy when the accelerometer is true. • The airbag system does not have a clock signal, we can use the accelerometer as the trigger. We can also use the Sonar clock since it is fast enough.

6. Truth Table

7. Next Step • Once the truth table is finished the Verilog file needs to be made. • I started with the input from the Sonar and clock to create the braking portion of the circuitry.

8. Verilog File • Once the outputs were set for the brakes I continued on to the airbag system. There I used nested if statements to achieve my outputs.

9. Behavioral Cell view • Once the Verilog file is complete, we can simulate it with Cadence tools. • We need to make a test fixture to model the possible inputs.

10. Test fixture • For my test fixture, I set the clock to start high. When I let it default to the low input it would give a don’t care on the first 13nanoseconds of airbag, and brakes. I realize this system would not affect real world situations, but it didn’t represent the system I was attempting to build. • The 13ns time period for half of the signal gives us a 26ns time period for a full wave, which is about 39KHz. • Once the simulation has run I can view the waveform. I verified some of the data.

11. Airbag Deployment Situation

12. Verify Truth Table • Left door collision sensor = true • Right door collision sensor = false • Front right collision sensor = false • From left collision sensor = true • Passenger Detector = true • Accelerometer = true Front collision, and drivers door with a passenger. Desired Output = 100; Deploy both front, and drivers side curtain

13. Verify Truth Table • Given Speed from Sonar: 00111101= 62kph : y=62/140 = .4428 Our given braking at .4666 is brakes = 0111 Our given braking at .4000 is brakes = 0110

14. Verify Truth Table • Accelerometer = true • Left door collision = true • Front right side collision = true • Passenger detection = true • Right door = true • Front left = false It is a front collision with left, and right door collisions, and a passenger in the car. This is the case where I decided only the driver would be protected and I would ignore the passenger side curtains. Both Airbags, and Drivers Side = 100

15. This is the Circuit We Want • Once we have developed some models and verified proper function, we can continue to producing our schematic. • We will use RTL Compiler to convert our Verilog file into a circuit schematic.

16. Initial Compiler Schematic

17. Schematic Synthesized Now export the schematic back to cadence after synthesized.

19. Schematic and Symbol • Symbol is similar to the desired diagram given in instructions.

20. Schematic can be very hard to follow • This is not something we would ever want to do by hand. • Multiple buses and logic gates.

21. Encounter • We have a schematic view, a behavioral view, and a symbol view. • Now we want a layout view. We will use encounter for this. • We import our synthesized Verilog file to set up Encounter.

22. Ready for Export • We set up our layout view in Encounter but our final goal is to export it back to our library.

23. Layout View • Encounter does not place pins correctly so upon import we need to re-pin all of our inputs, or they will give us DRC errors.

24. The Finale • Once the layout is good, we can extract our layout. • Now we run our Layout VS. Schematic to verify our schematic and extracted view have the same components and connections.

25. Suggested Changes to Project • Allow for driver and passenger side curtain airbags to deploy in the same incident. • Implement the sonar into the airbag system( Variable-force deployment) From Wikipedia: “Advanced airbag technologies are being developed to tailor airbag deployment to the severity of the crash, the size and posture of the vehicle occupant, belt usage, and how close that person is to the actual airbag. Many of these systems use multi-stage inflators that deploy less forcefully in stages in moderate crashes than in very severe crashes. Occupant sensing devices let the airbag control unit know if someone is occupying a seat adjacent to an airbag, the mass/weight of the person, whether a seat belt or child restraint is being used, and whether the person is forward in the seat and close to the airbag. Based on this information and crash severity information, the airbag is deployed at either a high force level, a less forceful level, or not at all.” • Rear curtain airbags, knee airbags, etc.