1 / 24

DNC, GEC & Non-linear interpolation

DNC, GEC & Non-linear interpolation. A Review of ”A Digitally Enhanced 1.8V 15-bit 40-MSample/s CMOS Pipelined ADC”[1] & ”Background Digital Calibration Techniques for Pipelined ADC’s”[2]. Pipelined ADC review. Non-linearities in DAC levels cause harmonic distortion

jag
Download Presentation

DNC, GEC & Non-linear interpolation

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. DNC, GEC & Non-linear interpolation A Review of ”A Digitally Enhanced 1.8V 15-bit 40-MSample/s CMOS Pipelined ADC”[1] & ”Background Digital Calibration Techniques for Pipelined ADC’s”[2]

  2. Pipelined ADC review • Non-linearities in DAC levels cause harmonic distortion • Common solution: Try to randomly distribute non-linearities in DAC so energy is spread out in the frequency spectrum • Interstage gain errors reduce SNDR/SNR • Solution: Apply correction gain digitally

  3. Detecting a known signal component in the output of an unknown system Mean of td = 0 • Td with a mean of zero: • Periodic signal • Pro: Can have a small N since power of td is evenly distributed in time • Con: Delta function in the frequency domain • White noise signal • Pro: Flat power density spectrum • Con: Need large N, ideally N=∞

  4. A Digitally Enhanced 1.8V 15-bit 40-MSample/s CMOS Pipelined ADC

  5. Outline • Dynamic Element Matching (DEM) • DAC Noise Cancellation (DNC) • Gain Error Correction (GEC) • Bootstrapped Switches • Timing

  6. Pipeline ADC from [1]

  7. Dynamic Element Matching (1) • Errors in DAC paths cause signal dependent error • Signal dependent error => Distortion

  8. Dynamic Element Matching (2) • Scrambler randomly selects a sequence of Sn such that Vout equals (1) • The error, e, is uncorrelated with the input signal if it is done correctly • This will effectively spread DAC noise power in the frequency spectrum (1)

  9. DEM encoder from [1] • With DEM encoder from [1] it can be shown that DAC noise inherits statistical properties of the pseudorandom sequence used in DEM • This can be used to estimate the mismatch in the DAC paths • Each path error is related to a specific pseduorandom sequence DAC path errors Known sequences

  10. DAC Noise Cancellation • Detect presence of known pseduorandom signal, s[n], in output, u[n] + εs[n], by calculating the covariance • Estimate DAC path error, ε, from covariance • Multiply psedurandom sequence by path error estimate and subtract from output • Repeat for all DAC paths

  11. Gain Error Calibration (GEC) from [1] • Estimate gain error from covariance of digitized residue and pseudorandom signal • Assuming small ε =>(1 + ε ) ≈ 1, multiply digitized residue by gain estimate and subtract from output

  12. Bootstrapped switches • Used on continous-time input sampling switches • Increased linearity • Used on switches connected to mid-supply or time-constant matching constrains • Reduced resistance

  13. Timing • First stage amplification is most important • Steal time for first stage Flash from second stage

  14. Results from [1] • SFDR is improved by 12dB with DNC and GEC enabled • SNDR is improved by 20dB with DNC and GEC enabled Signal Without calibration With calibration

  15. Background Digital Calibration Techniques for Pipelined ADC’s

  16. Outline • Error Model • Calibration Method • Non-linear Interpolation • Quantization Effects on Interpolation

  17. Error Model

  18. Positive calibration voltage Negative calibration voltage Error measurement • Measure gain error in each stage by applying known calibration voltage, Vcal-i

  19. Simulation results • Simulated performance (DNL & INL) with and without gain calibration

  20. Non-linear Interpolation • Uses fitting of high order polynomials to estimate missing sample. • Uses causal and noncausal taps Normalized coefficients

  21. Non-linear Interpolation • Limits input bandwidth of converter below Nyquist Fin < ½ Nyquist Fin < Nyquist

  22. Non-linear Interpolation • Interpolation error depends on the number of taps • Achieve higher bandwith with a certain error by using more taps

  23. Quantization Effects on Interpolation • Quantization noise limits performance of interpolation • Each tap adds quantization noise to total noise power • Limits the number of taps Variance vs number of taps

  24. References • Eric Siragusa & Ian Galton; ”A Digitally Enhanced 1.8V 15-bit 40-MSample/s CMOS Pipelined ADC”; IEEE Journal of Solid State, Vol. 39, NO. 12, December 2004 • Un-Ku Moon & Bang-Sup Song;” Background Digital Calibration Techniques for Pipelined ADC’s”; IEEE Transatctions on Circuits and Systems-II, Vol. 44, NO. 2, Febuary 1997

More Related