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EECS 312 Discussion 3. 09/20 Shengshuo Lu (luss@umich.edu). Overview. Reminder HW 1: Due Sep 24 Diode Transistors. Diode. G. S. D. Diode. Diode. Built-in Potential Depletion Region Width. Diode Current. Diffusion capacitance. NMOS. G. S. D. Threshold Voltage.
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EECS 312 Discussion 3 09/20 Shengshuo Lu (luss@umich.edu)
Overview • Reminder • HW 1: Due Sep 24 • Diode • Transistors
Diode G S D
NMOS G S D
Threshold Voltage • 0 < VGS < VT • Repel mobile holesand accumulation of electron beneaththe gate oxide • VGS > VT • Surface is as strongly n-type asthe substrate is p-type
Operation Regions – Linear (lab 2) • VGS > VT • VGS – VT > VDS • Linear contribution of VGT to ID In case of a P-type MOSFET, the inequalities used above should be directed opposite
Operation Regions – Saturation (lab 2) • VGS > VT • VGS – VT ≤ VDS • Quadratic contribution of VGTto ID • channel-length modulation parameter In case of a P-type MOSFET, the inequalities used above should be directed opposite
-4 x 10 2.5 VGS= 2.5 V Early Saturation 2 VGS= 2.0 V 1.5 Linear Dependence (A) D I VGS= 1.5 V 1 VGS= 1.0 V 0.5 0 0 0.5 1 1.5 2 2.5 V (V) DS Operation Regions – Velocity Saturated Short Channel Effects Strong electric field causes carrier mobility degradation : Compared to feature scaling, voltage scaling is lagging behind
A unified model • If VDS is minimum: • Linear region • 2. If VGT is minimum: • Saturation Region • 3. If VDSAT is minimum : • Velocity saturated region