Firewire (IEEE 1394): A Survey

1. Firewire (IEEE 1394): A Survey by Guadalupe Hernandez Sumantra Dasgupta Abdullah Cerekci Gonzalo Rodriguez

2. Introduction • Firewire: • Oficially known as IEEE-1394 • next generation of Plug and Play • With standard speeds of 100, 200 and 400 Mbps • ideal for connecting high-end consumer electronics (such as digital A/V equipment ) • Outline: • Description, Motivation and Evolution of Firewire – Abdullah Cerekci • Protocol- Guadalupe Hernandez • Working and Application- Sumantra Dasgupta • Improvement, 1394b, Future Research on Firewire- Gonzalo Rodriguez

3. IEEE-1394 • First introduced as Firewire by Apple Computer in the late 1980s • Serial bus standard to support high-bandwidth requirements of devices such as digital video equipment and high-performance mass storage • Performing well in Real-time data streaming

4. Research Motivation in Firewire • The ability to work with time sensitive data is growing in importance • Small products are favored for portability, convenience, and material usage resources • The need and desire for Peer to Peer computing is growing • There is a desire to keep data digital for as long as possible as a means to reduce system cost, complexity, and improve signal integrity • In multimedia market, most of the data is video and audio

5. Evolution of IEEE-1394 • First introduced as Firewire by Apple Computer • IEEE Study Group approved December 1986 • Basic design set by January 1987: Cable (10m) and backplane environments 2 Mb aud/sec base rate, 8 Mb aud/sec optional high-speed rate Bit-serial arbitration, 4B5B data encoding Guaranteed latency Read/write/lock transactions with 32-bit address space Cost for silicon/connector/cable of < $15 • Apple started full scale development in 1988: Xilinx-based 12.288 Mb aud/sec system 49.152 Mbaud cable transceiver fabbed

6. Evolution of IEEE-1394 (Cont…) • Apple started full scale development in 1988 Xilinx-based 12.288 Mb aud/sec system 49.152 Mbaud cable transceiver fabbed • Apple designed 98.302 MBit/sec PHY in 1992 TI built first test chips Connector based on Nintendo Gameboy • TI delivered “draft 6” PHY. It was working Apple and TI win “Most Significant Technology” award • IEEE 1394-1995 was ratified in 1995 First products Sony DV camcorders in 1995, many others by 1997 Sony machine vision cameras

7. Evolution of IEEE-1394 (Cont…) • IEEE Std. 1394a-2000, was approved in March 2000: speeds of 100 Mbytes per second, 200 Mbps, and up to 400 Mbps supports up to 63 devices maximum cable length of 4.5 meters between devices improved traffic control and power management features • 1394b finished in 2002: speeds up to 1,600 Mbps

8. General Specifications Connector Diversity: • six-pin connector is composed of 6 wires (2 for power + 4 for signals) • four-pin connector (power wires are missing) is about half the size of a USB: connector choice for many consumer electronics products especially self-powered portable devices

9. General Specifications (Cont…) Communication Diversity: • IEEE 1394 supports both asynchronous and isochronous communications • ideal for applications such as digital audio and video, which demand real-time data transfer • Its peer-to-peer interface makes it possible to dub from one device (a digital video camera, for instance) to another without a computer For example, a digital camera can send pictures directly to a printer

10. Characteristics Overview • Asynchronous/Synchronous transfer • Four layers are defined to simplify hardware and software implementation -Bus Management Layer -Transaction layer -Link layer -Physical Layer

11. Isochronous Transfer • Data delivery at constant intervals (125 μs) • Do not require confirmation of data delivery • Defines 6-bit channel number allowing data stream to be broadcast • Example: data from a CD to a speaker that must occur at a constant rate to reproduce the sound without distortion • Applications must request the bandwidth from the resource manager node

12. Isochronous Transfer (Cont…)

13. Asynchronous Transfer • Confirmation to the initiator that transfer was successfully received • Verifies data delivery via CRC, if errors occur retries are attempted under software control • Targets a particular node using a 64-bit address • Amount of data transferred depends on transmission speed • Example: applications that require that data transfers occur without any corruptions • Require a more complex bus protocol • Are initiated by a requester node and received by a responder node that returns a response. • Consist of two subactions: 1. request subaction.- transfers the address, command and data from requester to responder 2. Response subaction.- returns completion of status back to the requester or returns data during read and lock transactions

14. Asynchronous Transfer (Cont…)

15. Asynchronous Transfer (Cont…)

16. Protocol Layers

17. Bus Management Layer • Supports bus configuration and management activities • Depends on the capabilities of the node but all most support automatic bus configuration • Channel number and bus bandwidth allocation for asynchronous transfers • The 1394 specification identifies three global management roles: • Cycle master • Isochronous Resource Manager • Bus manager

18. Transaction Layer • Supports only asynchronous transfer. • Supports request-response protocol for read, write and lock operations. • Provides the following services: • Request: used by the requester to start a transaction • Indication: notifies the responder of the request • Response: used by the responder to return status or data to request • Confirmation service: notifies the requester that the response has been received • Adds verification of packet delivery and supplies a 1–byte acknowledgement for each packet received

19. Transaction Layer (Cont…)

20. Link Layer • For asynchronous transfers, translates transaction layer requests into packets to be delivered over the serial bus and back when received by responder. Performs CRC. • For isochronous transfers provides interface between isochronous software driver and physical layer. During transmission creates the packet to be sent across the cable. Also receives packets and decodes the channel number and if destined for the node, forward it to the software driver.

21. Physical Layer • Provides the electrical and mechanical interface • Implements an arbitration process to ensure only one node at a time transfers data across the bus • Uses two twisted pairs for signaling events • Bus configuration • Arbitration • Data transfer • Two type of cables are supported: 6 and 4 pin connectors • NRZ encoding to reduce the frequency component • Bus configuration: Major role of the physical layer. Begins with power up or when a new device is added to the bus • Arbitration: • Data transmission: Bi-directional data delivery. Data is transferred on Twisted pair B (TPB) while a strobe is delivered over Twisted Pair A (TPA)

22. IEEE1394 internals • IEEE 1394 network is made of point-to-point connections • It becomes a logical bus by repeating the signal at input of a node to all it’s outputs----free topology

23. IEEE1394 internals(Cont…) • Repeater mechanism at each node delays signal transmission • Idle times are necessary to prevent data collisions • Arbitration is necessary for fair availability of bus to each node • Data transfer is either -Asynchronous: question-answer game Made of request-ack-delay-ans- -ack sequence Delay slot is used by other nodes Ack consists status of receiver or abort Packets are made of data and payload Payload is typically start,stop and parity check

24. IEEE1394 internals (Cont…) • Data transmission can also be -Isochronous The talker needs to allocate channel and bandwidth at the Isochronous Resource Manager (IRM) Data is broadcast, so multiple nodes can be allowed to listen 80% of total bandwidth is used for Isochronous transfer Has 3q overhead Data field can be upto 1200q

25. IEEE1394 internals (Cont…)

26. IEEE1394 internals (Cont…) • The complete 1394 packet consists of 4 major parts -Arbitration Phase -Data_Prefix and Speed signaling -Data packet with specified header -Data_End • Data_Prefix is needed for synchronization of internal DLLs • The root node can access the bus after Arb time has occurred • All other nodes have to arbitrate and access the bus through the root node

27. IEEE1394 internals (Cont…) • Gaps are put between packets to avoid collisions • Isochronous packets are separated through isochronous gaps (40ns) • Asynchronous packets are separated through arb_reset gaps (280ns-10µs) • Subaction graphs separate Isochronous and Asynchronous transactions (530ns-21µs)

28. IEEE1394 internals (Cont…) • Payload Estimation Various factors affect payload: 1. Kind of data transfer on the bus (big/small data): As payload descreses, so does efficiency. But CRC and ack provide reliability 2. Number of hops the packet has to pass: Determines the value of the gap count 3. Position of the requestor to root: more number of repeater, longer is the arbitration time (2x64ns at each repeater) 4. Cable length: propagation time of 5ns/meter

29. IEEE1394 internals (Cont…)

30. IEEE1394 internals (Cont…) Electrical • Packet based technology for cable or back-plane based environments • Addressing is memory based rather than channel based • Device addressing is 64 bits wide: -10 bits for bus ID -6 bits for node ID -48 bits for memory address • PHY can supply power to devices • Nodes act as repeaters • 16-24 hops of 4.5m each are used to get a total length of 72m-108m • Heterogeneous environment operation eith optical cables and low cost twisted pair cables. • Bilingual PHYs are used to translate between 1394-1995 and 1394a-2000 world (using DS coding; speed matching) and 1394b world (8B10B coding; electrical to opt)

31. IEEE1394 internals (Cont…) • Protocol -Both asynchronous (explicit addr) and Isochronous (broadcast) transfer -Both real-time and non real-time -Network setup: 1.Bus reset phase: Previous tree topology is cleared 2.The tree ID sequence determines the actual structure 3. Root node is dynamically or forcefully assigned 4.A self ID phase: Nodes introduce mutually; each gets an address 5.Bus goes into idle state waiting for arbitration to begin -Multi-speed transactions

32. Isochronous transfer internals • It’s a broadcast mode of transfer. • The talker needs guaranteed channel and bandwidth. • Setting up the transaction: IRM provides channel number and bus bandwidth to talker. Two registers are defined for this purpose: CHANNELS_AVAILABLE BANDWIDTH_AVAILABLE These registers must be accessed via compare and swap lock transaction to ensure exclusive access when allocating these resources.

33. Isochronous transfer internals (Cont…) • Maintaining Synchronization: Maintain synchronization with isochronous clock intervals -The root node issues a cycle start packet at approximately 125µs intervals. -Cycle start synchronizes all isochronous channels -PHY detects cycle start packet and issues event notification to Link layer controller -Link layer controller issues “link cycle synch” indication to the application

34. Isochronous transfer internals (Cont…)

35. Application: Computer to Video Camera

36. Application: Computer side • TSB12LV22/OHCI-Lynx is the first Open Host Controller Interface Link Layer controller built to IEEE1394 specifications • It interfaces host PC with high-speed peripherals • Supports speeds up to 400Mbits/s • Provides four GPIOs. • TSB41LV03 is a Physical Layer supporting up to 400Mbits/s • It provides the analog transceiver functions needed to implement a three port node in a cable based IEEE1394-1995/IEEE1394a n/w. • The figure shows the Link Layer and the Physical Layer combined working with the host PC

37. Application: Computer side (Cont…)

38. Application: Video Camera side • TSB12LV31 is the industry’s first general purpose link layer controller. • It is 1394-1995 compliant • Performs bidirectional asynchronous/isochronous data transfer to and from an IEEE 1394-1995 serial bus physical layer (phy) device • TSB21LV03A is a 200Mbps, 3-port device capable of sending and receiving data at 100/200Mbps • The next figure shows the two working in conjunction in a 1394 digital video camera

39. Application: Video Camera side (Cont…)

40. Software Implementation: Windows Video Capture Architecture under Windows 98 and Windows 2000

41. Software Implementation: Windows (Cont…) Before drivers can start their IEEE 1394 device, they must complete the following steps to set up isochronous transfer: • Choose isochronous transfer speed. • Allocate bandwidth for isochronous transfer. • Allocate an isochronous channel. • Allocate a resource handle for isochronous transfer. • Attach buffers to the resource handle. • Begin the isochronous data transfer. Once a device no longer needs to transfer data, the driver must inform the bus that the operation is complete, and then must deallocate the isochronous resources it allocated when setting up. User applications are responsible for determining how many isochronous channels they need and their required bandwidth.

42. Software Implementation: Windows (Cont…) • class Win32_1394Controller : CIM_Controller { uint16 Availability; //status string Caption; //description uint32 ConfigManagerErrorCode; //win32 config manager error code boolean ConfigManagerUserConfig; //if true then use user defined config string CreationClassName; //unique class id string Description; //description of object string DeviceID; //unique device id boolean ErrorCleared; //if true last error is cleared string ErrorDescription; //description of error and corrective actions datetime InstallDate;//installation date and time uint32 LastErrorCode; //last error code reported by the logical device string Manufacturer;//name of manufacturer uint32 MaxNumberControlled; //number of devices controlled string Name; //name of controller string PNPDeviceID;//plug and play device id uint16 PowerManagementCapabilities[]; //various power modes boolean PowerManagementSupported; //if true then power can be managed uint16 ProtocolSupported;//protocol used to access controlled device string Status; //status of object uint16 StatusInfo;//status of logical device string SystemCreationClassName; //value for scoping CreationClassName property string SystemName; //name of scoping system datetime TimeOfLastReset;//date and time controller was last reset }; //capabilities and management of a 1394 controller

43. Software Implementation: Windows (Cont…) • class Win32_1394ControllerDevice : CIM_ControlledBy { uint16 AccessState; //active/inactive Win32_1394Controller ref Antecedent; //to 1394 controller CIM_LogicalDevice ref Dependent; //to logical device uint32 NegotiatedDataWidth; //in bits uint64 NegotiatedSpeed;//in baud uint32 NumberOfHardResets; //issued by controller uint32 NumberOfSoftResets;//issued by controller }; //interfaces Win32_1394Controller with CIM_LogicalDevice • CIM_LogicalDevice denotes a hardware entity that may or may not be realized in physical hardware

44. Applications

45. Other Bus Interfaces

46. Other Bus Interfaces (Cont…)

47. FireWire 400Mbit/s 800Mbit/s supported Works without control, devices communicate peer-to-peer Cable up to 100 m. Limited devices supported Power supply to external devices is 1.25A/12V (max.) The only computer bus used in digital video cameras USB 1.5 Mbit/s 12Mbit/s 480Mbit/s supported USB controller is required to control the bus and data transfer Cable up to 5 m. Great number of devices supported Power supply to external devices is 500 mA/5V (max) Full compatibility with USB 1.1 devices FireWire vs. USB

48. IEEE 1394b • No change for software and applications • All existing 1394 devices are “home network ready” • Improvements: • Lower cost and more flexible for the PC OEM • Even more efficient • Up to 1.6 Gbits/sec • Up to 100m • Fully backwards compatible

49. Definition of 1394b • Additional “Beta” mode of operation • 1394a operation is called “Legacy” mode • 1394b PHYs may have Legacy ports, Beta ports, or “Bilingual” ports • Bilingual ports negotiate with attached peer for best mode of operation • Beta mode yields higher speeds, longer distance, improved efficiency

50. Beta mode: Higher Speeds • 1394b specifies S800 and S1600 data transmission rates • Also future-proofs with media for S3200 • Electrical spec still uses two twisted pairs • Transmission is now continuous dual simplex • One pair transmitting continuously in each direction • Transmission speed never varies • Simpler and more efficient than 1394a